Is there a more up to date XN Specification document?
-
- XCore Addict
- Posts: 204
- Joined: Sun Jun 01, 2014 10:25 pm
Is there a more up to date XN Specification document?
I notice some xn files have a "core" element instead of a "tile" element. I there updated documentation that explains this?
-
- Respected Member
- Posts: 347
- Joined: Wed Jan 27, 2016 5:21 pm
Hi,
My guess is that the ones that use 'core' are old.
Ie, the XN file is old, the documentation is new.
Cheers,
Henk
My guess is that the ones that use 'core' are old.
Ie, the XN file is old, the documentation is new.
Cheers,
Henk
-
- XCore Addict
- Posts: 204
- Joined: Sun Jun 01, 2014 10:25 pm
The publication date on the XN File Spec is 11/11/2013 and there is no revision history in the document. The rev number is X3944B.
On the web site, the document number is listed as X3944A with a revision date of Oct 2016.
I would just like confirmation that this document is in fact up to date.
On the web site, the document number is listed as X3944A with a revision date of Oct 2016.
I would just like confirmation that this document is in fact up to date.
-
- Respected Member
- Posts: 347
- Joined: Wed Jan 27, 2016 5:21 pm
That's rather odd isn't it. Bear with us.
-
- Member++
- Posts: 28
- Joined: Thu Jan 28, 2010 10:41 am
Sorry for confusion. xmos.com was showing the date the linked page was last updated instead of the date the linked download file (XN spec) was updated. This has now been fixed to show the download file date.
The last published update to the XN spec was 2013.
Huw
The last published update to the XN spec was 2013.
Huw
-
- XCore Addict
- Posts: 204
- Joined: Sun Jun 01, 2014 10:25 pm
The XN specification has not been updated for the XS2 devices.
Specifically, there is a new class of device "SQIFlash" and the link delays are different in the XS2 XN files.
In the spec, link delays are described as follows:
Of the form x,y where x specifies the inter delay value for the endpoint, and y specifies the intra delay value for the endpoint. If a value for y is omitted, x,1 is used. If both values are omitted, 1,1 is used.
In the SLICEKIT-XL216.xn file, a link delay is specified as "5clk".
What does this "5clk" value mean? How has the link spec changed from the inter-delay and intra-delay values?
Also the Boot Source is not current
Again the SLICEKIT-XL216.xn file has a boot source string "bootFlash" without the "SPI:" specified in the documentation.
I got an example file called XE216-XL216.xn from another post
In it are a tile attribute in the Bootee which is not documented.
Also in this example is a Link attribute Link="2" which does not conform to the description in the documentation. What does this link attribute mean?
When can an updated specification be expected?
Specifically, there is a new class of device "SQIFlash" and the link delays are different in the XS2 XN files.
In the spec, link delays are described as follows:
Of the form x,y where x specifies the inter delay value for the endpoint, and y specifies the intra delay value for the endpoint. If a value for y is omitted, x,1 is used. If both values are omitted, 1,1 is used.
In the SLICEKIT-XL216.xn file, a link delay is specified as "5clk".
What does this "5clk" value mean? How has the link spec changed from the inter-delay and intra-delay values?
Also the Boot Source is not current
Again the SLICEKIT-XL216.xn file has a boot source string "bootFlash" without the "SPI:" specified in the documentation.
I got an example file called XE216-XL216.xn from another post
In it are a tile attribute in the Bootee which is not documented.
Also in this example is a Link attribute Link="2" which does not conform to the description in the documentation. What does this link attribute mean?
When can an updated specification be expected?
Last edited by gerrykurz on Fri Oct 28, 2016 8:52 am, edited 2 times in total.
-
- XCore Addict
- Posts: 204
- Joined: Sun Jun 01, 2014 10:25 pm
What do the link delay numbers mean? Is the x value the symbol delay or the token delay? What does a value of 1 mean. Is this one clock delay or is it 1 plus the offset? Would the fastest settings of x and y be 0,0 or 1,1?
-
- XCore Addict
- Posts: 204
- Joined: Sun Jun 01, 2014 10:25 pm
I am getting a compile error with my XN file:
and here is my xn file:
Never mind, I found the answer in another post. There is a new source attribute called BootMode which again is not in the documentation.500RACK_REVB.xn:64 Error: XN11199 No bootmode attribute has been specified for Node "1".
and here is my xn file:
<?xml version ="1.0" encoding ="UTF-8"?>
<Network xmlns="http://www.xmos.com"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.xmos.com http://www.xmos.com" >
<Type>Board</Type>
<Name>Apparata 500 Series Rack</Name>
<BoardId>B1-0</BoardId>
<!-- Board Version B1-0 -->
<!-- File Version 1.0 -->
<Declarations>
<Declaration>tileref tile[4]</Declaration>
</Declarations>
<Packages>
<!-- AVB Audio Processor -->
<Package Id="P1" Type="XS2-LnA-512-TQ128" >
<Nodes>
<Node Id="0" InPackageId="0" Type="XS2-L16A-512" Oscillator="25MHz" SystemFrequency="500MHz">
<Boot>
<Source Location="bootFlash" />
<Bootee NodeId="1"/>
</Boot>
<Tile Number="0" Reference="tile[0]">
<!-- SPI FLASH -->
<Port Location="XS1_PORT_1B" Name="PORT_SQI_CS"/>
<Port Location="XS1_PORT_1C" Name="PORT_SQI_SCLK"/>
<Port Location="XS1_PORT_4B" Name="PORT_SQI_SIO"/>
<!-- I2S -->
<Port Location="XS1_PORT_1P" Name="PORT_MCLK_OUT"/>
<Port Location="XS1_PORT_1O" Name="PORT_MCLK"/>
<Port Location="XS1_PORT_1N" Name="PORT_SCLK"/>
<Port Location="XS1_PORT_1M" Name="PORT_LRCLK"/>
<Port Location="XS1_PORT_1D" Name="PORT_SDATA_OUT0"/>
<Port Location="XS1_PORT_1E" Name="PORT_SDATA_IN0"/>
<Port Location="XS1_PORT_1F" Name="PORT_SDATA_IN1"/>
<Port Location="XS1_PORT_1G" Name="PORT_SDATA_IN2"/>
<Port Location="XS1_PORT_1H" Name="PORT_SDATA_IN3"/>
</Tile>
<Tile Number="1" Reference="tile[1]">
<!-- I2C -->
<Port Location="XS1_PORT_1C" Name="PORT_I2C_SCL"/>
<Port Location="XS1_PORT_1D" Name="PORT_I2C_SDA"/>
<!-- ETHERNET -->
<Port Location="XS1_PORT_1I" Name="PORT_ETH_RXCLK"/>
<Port Location="XS1_PORT_1P" Name="PORT_ETH_RXDV"/>
<Port Location="XS1_PORT_1J" Name="PORT_ETH_RXER"/>
<Port Location="XS1_PORT_4C" Name="PORT_ETH_RXD"/>
<Port Location="XS1_PORT_1H" Name="PORT_ETH_TXCLK"/>
<Port Location="XS1_PORT_1G" Name="PORT_ETH_TXEN"/>
<Port Location="XS1_PORT_4D" Name="PORT_ETH_TXD"/>
<Port Location="XS1_PORT_1E" Name="PORT_ETH_MDC"/>
<Port Location="XS1_PORT_1F" Name="PORT_ETH_MDIO"/>
</Tile>
</Node>
</Nodes>
</Package>
<!-- Ethernet Repeater -->
<Package Id="P2" Type="XS2-LnA-512-TQ128" >
<Nodes>
<Node Id="1" InPackageId="0" Type="XS2-L16A-512" Oscillator="25MHz" SystemFrequency="500MHz">
<Boot>
<Source Location="LINK" />
</Boot>
<Tile Number="0" Reference="tile[2]">
</Tile>
<Tile Number="1" Reference="tile[3]">
</Tile>
</Node>
</Nodes>
</Package>
</Packages>
<Nodes>
<Node Id="2" Type="device:" routingId="0x8000">
<Service Id="0" Proto="xscope_host_data(chanend c);">
<Chanend Identifier="c" end="3"/>
</Service>
</Node>
</Nodes>
<!-- Link definitions -->
<Links>
<!--Package 1 Links -->
<Link Encoding="2wire" Delays="5clk" Flags="XSCOPE">
<LinkEndpoint NodeId="0" Link="XL0" />
<LinkEndpoint NodeId="2" Chanend="1" />
</Link>
<!-- Inter-Package Links -->
<Link Encoding="5wire" Delays="0,1">
<LinkEndpoint NodeId="0" Link="XL4"/>
<LinkEndpoint NodeId="1" Link="XL3"/>
</Link>
<Link Encoding="5wire" Delays="0,1">
<LinkEndpoint NodeId="0" Link="XL7"/>
<LinkEndpoint NodeId="1" Link="XL0"/>
</Link>
</Links>
<!-- Flash device definitions -->
<ExternalDevices>
<Device NodeId="0" Tile="0" Name="bootFlash" Class="SQIFlash" Type="IS25LQ016B">
<Attribute Name="PORT_SQI_CS" Value="PORT_SQI_CS" />
<Attribute Name="PORT_SQI_SCLK" Value="PORT_SQI_SCLK" />
<Attribute Name="PORT_SQI_SIO" Value="PORT_SQI_SIO" />
</Device>
</ExternalDevices>
<!-- JTAG Chain information -->
<JTAGChain>
<JTAGDevice NodeId="0"/>
<JTAGDevice NodeId="1"/>
</JTAGChain>
</Network>