Hi,
I am trying to understand and translate the slice kit handling of two chained board with regard to the boot mode controls and JTAG routing.
I am finalizing a hardware design the has two XS1-L2 parts in a master/slave relationship and I want to hardwire the mode controls and jtag routing rather than having the logic to allow for a single board or two boards.
With regard to the mode control pins 2&3, on the master board they would be tied to the JTAG TRST in order to have the boot source be JTAG (mode 2,3 = 00) for debugging and SPI (mode 2,3 = 11) for normal boot up. My question is about the slave board. Does it need to have mode 2,3 = 00 for debugging or is it always set up for booting from XMOS LINK B (mode 2,3 = 10)?
And is there a simple way to route the JTAG signals to the two L2 parts without all the muxing on the slice kit board?
Another question is regarding the Mode 0,1 pins. It seems that the setting of these are not important when the operating frequency is specified in the xn file. Is this correct?
Slice Kit Mode Control and JTAG signal routing
MODE2:3 should be 00 for "JTAG boot" (no boot) mode
on the slave board as well.
MODE0:1 needs to be set properly for whatever frequency
reference clock you use; the mode pins are used to determine
the boot-time PLL settings, before anything in your XN has
any chance of coming into play.
on the slave board as well.
MODE0:1 needs to be set properly for whatever frequency
reference clock you use; the mode pins are used to determine
the boot-time PLL settings, before anything in your XN has
any chance of coming into play.