XCore Exchange

Are there any architeture issues using a 10 tile linear L1 array linked via a single chained XLINK? Booting from first tile, all other XLINKB's pointing to boot tile.

Is a JTAG chain of 10 tiles any issue for program / debug?

What is the largest SPI Flash size supported (either native or using custom header), if any limit?

Remember to buffer selected JTAG lines, the XK1A illustrates this, not sure how many of those can be chained?

regards
Al

bearcat wrote:Are there any architeture issues using a 10 tile linear L1 array linked via a single chained XLINK? Booting from first tile, all other XLINKB's pointing to boot tile.

There are no problems for fewer than 15 or 16 L1s in a chain as far as I know.
Architecturally you can have 65536 in a single chain but I do not think the tools
handle that currently.

Is a JTAG chain of 10 tiles any issue for program / debug?

It should be no problem. I never tried though, don't blame me if stuff
explodes ;-) And do buffer (Schmitt trigger) TCK and TMS, as Folknology
says.

What is the largest SPI Flash size supported (either native or using custom header), if any limit?

The boot ROM code sends a "03 00 00 00" command ("slow read", from
address 000000). As long as your device responds sanely to that, you
can boot from that (almost all devices do). So almost all devices up to
at least 16MB should work.

To see if the flash library supports a specific device, just see if it does
(i.e., read docs. Boring, I know).

If the boot ROM does not work with a specific device, you can always put
your own support code in OTP. Luckily you most likely won't have to.

Folknology wrote:Remember to buffer selected JTAG lines, the XK1A illustrates this, not sure how many of those can be chained?

You can chain any number of JTAG devices: there is no delay per "hop",
every JTAG device drives its TDO synchronously (assuming you feed every
device with the same TCK with small enough skew, etc.)

Almost all JTAG host programs have some limitation on chain length, but
it is usually gi-nor-mous so not a practical issue.

segher wrote:

Folknology wrote:Remember to buffer selected JTAG lines, the XK1A illustrates this, not sure how many of those can be chained?

You can chain any number of JTAG devices: there is no delay per "hop",
every JTAG device drives its TDO synchronously (assuming you feed every
device with the same TCK with small enough skew, etc.)

You of course were asking how many XK1s can be chained, not how many
could be chained if you do give them all the same TCK and TMS and you get
the TDO from the last device in the chain without buffering. I answered the
wrong question, whoops.

All XK1s in the chain _do_ use the same TCK and TMS, and they all put a
single load on it, so there cannot be more than 20 or so in a chain. You'll
need to lower the JTAG frequency somewhere around that same number
of XK1s so that it'll still work with the chain of MUXes on the TDO.

Thanks all.

I will assume buffers are recommended on RST, TRST, TMS, and TCK due to the errata on the JTAG, driving more than 1 tile.

So can I daisy chain the TDO -> TDI to each tile without a buffer? The output impedance, or voltage levels, are not specified for the JTAG outputs, that I have found. Are they the 4mA or 8mA variety? If 8mA should work without a buffer, but 4mA maybe not.

Yes, you can daisy chain TDO and TDI without buffers as they're only ever single output to single input.

TMS and TCK can be buffered with schmitt triggers, but you probably want to use an open drain buffer for !RST and !TRST. I've learned this the hard way on my 3xL2 board! I actually didn't buffer from the JTAG for !RST and !TRST but I did buffer from the output of my power supply monitor and this needs to be OR'd with the JTAG lines which is why the open drain outputs are needed.

bearcat wrote:Are there any architeture issues using a 10 tile linear L1 array linked via a single chained XLINK? Booting from first tile, all other XLINKB's pointing to boot tile.

Is a JTAG chain of 10 tiles any issue for program / debug?

The XTAG-2 as of the 12.0 release will support 128 L series tiles.

Hmm the Xtag 2's I have handy here are both marked Rev 1V0 on the silk screen, how the hell did we get to 12V0! what have I missed?

regards
Al

Folknology wrote:Hmm the Xtag 2's I have handy here are both marked Rev 1V0 on the silk screen, how the hell did we get to 12V0! what have I missed?

regards
Al

xTIMEcomposer v12 Al :)