Well, I'm still designing my 4-processor board, I have not the actual hardware and all informations I have come from the data sheet and the compiler warnings; they say you can't use both at the same time. Nevertheless I will keep the 5-bit links 4 and 7 wired to the chip on the PCB, because I could ...

I found exactly the same problem. The ports used by the USB PHY overlap links 4 and 7 (and 3 if you connect it to tile 1). You can only put the PHY on tile 0 and use 2-bit links 0 and 3. Warning: the data sheet shows port 1J used for clock, while the USB driver assigns port 1C to it; who is right? (...

I can confirm that the xlink code on GitHub works fine, I use it daily between my XS1/XS2 and Altera/Xilinx FPGAs. I added 9-bit FIFOs to the input and output paths and access the link through two 16-bit registers. The management of control characters (HELLO,EOM..) and of credits is done in software...

<t>Using xTIMEcomposer 14.1, I received an error XN11199 ("No bootmode attribute has been specified for Node xxx"). I was trying to define a network where an XU216 is booted via link0 from another similar chip.<br/> <br/> This error, and the 'bootmode' attribute, are undocumented. What does it mean?...

richard: following your suggestions I wrote an XN file which enables both links without errors and works (at least on Xscope, I will test the FPGA channel later but from the LEDs it seems OK). By the way, the package I used is called "xlink_fpga", it's not on GitHub, and I don't have a lin...

segher: I eventually found the source of my troubles: see http://www.xcore.com/questions/2833/xs1-l16-master-reset-pcu-problem When designing my board I followed a FAULTY DATASHEET!! And I connected the PCU pins to ground.. of course it didn't work, the chip ignores the RST_N signal in these conditi...

Hello, I made a custom board with an XS1-L8-64-TQ128 connected through link B with an Altera FPGA. I ported the existing Verilog code, and it works fine. Now for the XMOS-side problems: 1) How to specify in an XN file that a link is attached to something non-XMOS? If the FPGA is defined as an XMOS ...

<t>Hi,<br/> <br/> I have exactly the same problem on my board, Xflash compiles and loads the executables but then hangs (or takes an inordinate amount of time to start). What is curious is that 13.0.0 beta1 under CentOs works fine; all the other versions I tried (13.1.0 and 13.2.0 under windows and ...