Search found 844 matches
- Fri Aug 06, 2021 3:52 pm
- Forum: Development Tools and Programming
- Topic: Inline assembler - making sense of operands
- Replies: 13
- Views: 8690
Re: Inline assembler - making sense of operands
According to the xCore200 architecture document, maccs should take four operands, two of which are both inputs and outputs. However, in the snippet below, two constants appear as additional input parameters. What's going on here? Is this indicating to the compiler to insert additional instructions ...
- Fri Mar 04, 2016 8:52 am
- Forum: XMOS Devices
- Topic: ESD damage to XMOS U6
- Replies: 16
- Views: 21776
Re: ESD damage to XMOS U6
[ This is a user forum, we are not XMOS. Some people here work for XMOS though; but for official support, you need to look elsewhere. ] Allowed ESD stress under the human body model is 2kV. It is much recommended you use a separate USB protection device, as the datasheets show; do you? VBUS is not u...
- Fri Jan 08, 2016 4:50 am
- Forum: Development Tools and Programming
- Topic: Parse error when including time.h
- Replies: 4
- Views: 13863
Re: Parse error when including time.h
Or include <xs1.h> last, does that work?
- Thu Jan 07, 2016 2:34 am
- Forum: Development Tools and Programming
- Topic: Parse error when including time.h
- Replies: 4
- Views: 13863
Re: Parse error when including time.h
Since "clock" is such a common name, it might be defined to something else already.
The error message does not say (does not say much useful at all).
The error message does not say (does not say much useful at all).
- Tue Dec 15, 2015 2:13 pm
- Forum: Development Tools and Programming
- Topic: synchronize Outputs
- Replies: 17
- Views: 20553
Re: synchronize Outputs
Diverge is the wrong word, sorry.
The two clocks will not be in synch, not every 20 clocks in your example
either. As long as the PLLs stay locked there will be a maximum difference,
yes. Whether that is good enough for your purpose I don't know.
The two clocks will not be in synch, not every 20 clocks in your example
either. As long as the PLLs stay locked there will be a maximum difference,
yes. Whether that is good enough for your purpose I don't know.
- Mon Dec 14, 2015 7:13 pm
- Forum: Development Tools and Programming
- Topic: synchronize Outputs
- Replies: 17
- Views: 20553
Re: synchronize Outputs
No, sorry; each chip has its own PLL. The clocks can (and will) diverge.hkr87 wrote:If you use multiple chips, make sure that all chips run of the same 25 MHz oscillator. This will guarantee that both chips have an identical internal clock that is as good as it can be.
- Thu Apr 30, 2015 3:12 pm
- Forum: Getting started
- Topic: i2c signalling?
- Replies: 20
- Views: 29411
Re: i2c signalling?
Ooh nice. Anything else new wrt ports? A usable cross-thread
PEEK, O/D on multibit ports, anything else?
PEEK, O/D on multibit ports, anything else?
- Wed Apr 29, 2015 2:29 pm
- Forum: Getting started
- Topic: i2c signalling?
- Replies: 20
- Views: 29411
Re: i2c signalling?
You cannot do open drain with a multi-bit port, not without
some external circuitry. You can fake it though (drive low
for low, switch to input for "high").
some external circuitry. You can fake it though (drive low
for low, switch to input for "high").
- Tue Apr 28, 2015 5:03 pm
- Forum: Development Tools and Programming
- Topic: Replicated pars and combining
- Replies: 9
- Views: 9638
Re: Replicated pars and combining
I know nothing about XC, but the par in main is special,
isn't it?
isn't it?
- Tue Apr 21, 2015 3:47 am
- Forum: Development Tools and Programming
- Topic: New instructions
- Replies: 19
- Views: 19265
Re: New instructions
Very nice :-) A few typoes / minor mistakes I remember after first reading: - "stauration"; - setci etc. seem to have some wrong markup, "exttt"; - one of the last chapters talks about XS1-G4. All the relative immediate branches (and ldap) use a multiplier of 2 everywhere in this...