Inferno on xCORE

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borisG
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Inferno on xCORE

Postby borisG » Sun Feb 16, 2014 8:45 pm

Hello all,

Has anyone thought about using Inferno (http://www.vitanuova.com) on the xCORE development boards?

Many thanks!

Shane.
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Bianco
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Postby Bianco » Sun Feb 16, 2014 9:26 pm

Needs 1MB RAM according to them: http://www.vitanuova.com/inferno/index.html
borisG
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Postby borisG » Thu Feb 27, 2014 11:50 pm

So I'd add an 8MB SDRAM SliceCARD.
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Bianco
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Postby Bianco » Fri Feb 28, 2014 12:39 am

The SDRAM will not be memory mapped so you will have to jump through hoops to get it working, and if you get it working there will be a significant performance hit. I wouldn't really recommend it. Another thought is using the flash overlays, but I am afraid it won't play nice with a preemptive scheduler.
borisG
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Postby borisG » Sun Mar 02, 2014 1:01 am

What about a hardline "Styx-on-a-chip" implementation? The Styx (9P2000) protocol can be implemented on small embedded processors, there was a demo on the Lego Mndstorms RCX, and there is an IP-Core implementation floating around for FGPAs and ASICs.

My goal is to run a small algorithm inside of the Styx-on-a-chip, as a payload, with the Styx handling transfers into and out of the XCore chip from the host (the RPi). Simply put, Styx handles the streaming of a real time file acquired by the RPi, and payload processes that file, sending the result back to the RPi.

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