Designing a simple xCore-200 Board

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bzyzny
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Designing a simple xCore-200 Board

Postby bzyzny » Sun Jun 19, 2016 8:51 am

Hi everyone, I recently stumbled upon XMOS and find their architecture fascinating, it looks really promising! I am currently teaching myself EE/PCB design and thought I could use an xmos chip for this project I'm working on. A more sane person would just buy an official dev board, but I would like to design my own. The starterKIT looks nice and is only $15, I will probably end up buying one but am more interested in the newer xCore series chips. Plus, the xCore-200 dev boards are expensive since they include a lot of extras like ethernet, servo ports, etc. My goal is to just make a really stripped down and basic xmos board to play around with.

I've read many of the datasheets, schematics, forum posts etc and have a pretty good idea what to do, but could use some help/advice on a few points. First, I'll explain my current progress.

For the first prototype, I've decided to use the XL208-256-TQ64. This has only 64 pins, is cheap and available in single quantity from Digikey. It will use external qspi flash, since you can get more MB for less $ than using xmos chips with integrated flash. It will use 4 layer PCB, which will cost more than 2 layer but will simplify routing and have better signal integrity. I would like to use SMD components wherever possible, unless there is some reason PTH would be better. I will be using KiCad since it is FOSS. Pretty sure I should be able to keep the dimensions <= 5x5cm, which is limit for SeeedStudios cheapest option.

Ok, so now for my questions. First, since there is not much info on xCore series available, I have been studying the design files for the explorerKIT-200 for reference. One concern is licensing, I did not find the terms for the Xmos documentation, and want to make sure I am not infringing anything if I copy parts of their schematic or layout.

Next, I am curious about how best to breakout the GPIO headers. Looking at the official dev kits, it does not seem that they have a standard for this. Except for the sliceCard PCIe connector, which seems less than ideal to me, but maybe someone can explain the benefits of this configuration. If possible I would like to make the pin headers compatible with an existing format, so I can use existing shields/hats. I think the TI Launchpad/Boosterpack format would be nice, since it would support 20, 40, and 80 pin configurations. This would be useful since, if all goes well, I might also make a board for the XE216 or even the XE232 which have more pins, and ideally would allow for expansion board compatibility between them. Also regarding pin headers, I noticed on the explorerKit-200, on the two rows of 0.1" pins, half of them are ground pins. Obviously this helps with impedance, noise and EMI, but it seems overkill, wouldn't 1 GND pin per 4-8 GPIO pin be sufficient?

The power distribution network requirements for the xCore are more complex than what I've dealt with so far, I understand the general idea but would benefit greatly if someone could explain whats going on here. I tried researching the topic but was having trouble finding relevant info, probably because I don't know the correct terms to use for searching. Also, the bypass caps for the VDD pins; on the explorerKit they are on the bottom of the PCB. I would like to avoid having components on the bottom if possible since I'll be assembling the prototype myself. Is this a matter of space constraints, or performance? Would it be ok to put connectors on the pcb and just hook it up to a variable benchtop power supply? I'm guessing that wouldn't work since the xCore requires the 3.3v rail to be stable before 1v core rail reaches 0.4v? Also the datasheets use the term monotonically in this context, what does that mean?

Sorry for the long post full of noob questions, maybe this project is beyond my skill, however I've already learned a lot and like a good challenge :) Also, hopefully this thread will become a useful reference for other beginners like me.
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mon2
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Postby mon2 » Sun Jun 19, 2016 5:16 pm

Hey bzyzny. Welcome to the world of XMOS. Let me start with a few comments to assist your project.

First, you are asking some very good questions. Does not appear to be beyond your skills so do continue to work on the raised project. We are all here to help. Highly recommend that you post your schematic and PCB (at least in PDF format) for a technical review and for others to offer their advice. Please do this before investing into the bill of materials (BOM) and/or PCB production.

The TQFP package sounds like a sane package to use for hand soldering. We have done this many times in the past early on at our company. Now we have SMT lines so the automation helps to crank out volumes once the design is solid.

You will find that some SMD part sizes are more common (cell phone driven ?) so hence lower costs. At this time of writing, believe that 0402 is the best bang for the dollar. You will need tweezers to place down such parts by hand. Otherwise, consider 0603 sized parts which will be slightly higher in cost.

Bulk caps are more practical in 0603 and/or 0805 size (ie. 10 uf, 22 uf, etc.) for your power supply. Too costly to source the same in 0402 footprint.

See figure 2 for the example schematic in the posted datasheet on how to apply the TQFP XMOS device you have selected. Note the details of the power supply. That is,+3V3 enters the board -> PG (power good) which is a fancy word for when the power rail of this regulator reaches xx value (often 80% or higher) then release the PG line. Often PG are open drain outputs which means that during power up, this line will be logic LOW till the threshold is reached then the same pin (PG) will be high impedance (HI-Z) so you are obligated to apply a pull-up resistor to +3V3. That is, when PG is HI-Z, the pull-up will force that line to be HIGH which then turns on the +1V0 regulator. Once the 1V0 rail is deemed to be stable, only then should you allow the XMOS CPU to reset. That is, 3v3 is stable first then 1v0 rail then release the reset on the XMOS CPU. Otherwise, you could have CPU lockups.

If you follow this chain of power supply events, you will be fine. You can either shadow the proven designs from XMOS or other users or shop around for your own parts to incorporate for example high voltage input LDO regulators. There are some automotive grade parts you could consider to support large voltage inputs such as 40 to 75 volts, etc. if you ever plan to through your board into a car. Power on surges inside are a car can be killers to such circuits.

A typical LDO is supporting of 5 volts as a peak input but some can support upto 18 volts as an input (ie. Exar / Diodes Inc AZ1117 series = SOT223 package @ 800 mA - most important is that such regulators will work with low impedance ceramic caps while others that do not offer this feature will start nasty oscillations = only electrolytic cap friendly). As a general rule, we do not like to use electrolytic caps in our designs due to a lower field life.

Digital designs require you to place filter caps all over the devices that will be used which often includes 0.1 uf, 0.01uf and a bulk cap like 10 uf. Too much capacitance (stay under 100 uf and you will be fine for the power rails) is not a good thing as the in rush current can tank the design but too little and you will have noise misfiring the operation of your design.

You will need a method to program your XMOS CPU so review the XSYS connector use. This will be used to basically JTAG program the CPU flash and/or debug the project.

The extra ground pins help to reduce noise when interfacing with outside devices. For example, we reviewed some SDRAM devices with the XMOS but it was a royal pain on the logic probes of the logic analyzer tool to monitor the high speed signals. Moving forward we purchased shielded cables for our tool and for each such signal applied a local ground and the review went much more smoothly. If you have the room, sprinkle in the grounds where you can. For high speed use, the extra grounds will help.

Not a bad idea to insert a polymer (resettable) SMD fuse in line with the first regulator + LED at the output of the 3v3 LDO. This will assist to remove the excessive current draw should the design be shorted, etc. and the reset after the short is removed. The GPIO pins are 3v3 tolerant only so if you want to add some extras, consider to place ESD devices or zeners to limit the max voltage the pins will see. That is, the diodes will limit the max to be under 3v3 but such parts add capacitance and are not equal in that there is a trigger value that must be reached before the diode functions. Best to review the datasheets for such parts. Also, such extra parts will limit the max speed of the GPIO pins (due to the loading capacitance) so that must be considered (although there are low capacitance devices on the market as well).

0.1" (2.54 mm) pitch pins are best for the general public. For ultra tiny projects, there are 2 mm pitch (ie. Samtec line). There are many such suppliers in Asia for similar parts. Watch out for some of the quality of such pins. Have seen some that are so poorly plated that they will not even solder well. You should be fine to consider major brands and suppliers like Digikey but are respectively higher costs (ie TE, Molex, etc.). We can assist if you want some reliable names from offshore vendors but their MOQ (mininum order quantity) is 1k+ per item.

Post your schematic with details of the parts you plan to use and can review and offer other tidbits.

Kumar
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Postby henk » Mon Jun 20, 2016 8:03 am

Hi bzyzny,

Re the licensing - feel free to copy any of the PCB designs that XMOS publishes on its website.

Very little to add to mon2's comprehensive post. Make sure that each of the VDD/VDDIO pins has a 100 nF decoupler on it, and make sure that one side of the decoupler is right on the pin, and the other side has a direct path back to the ground paddle (via to the ground plane, straight line to the middle of the chip, multiple vias back to the ground paddle).

Cheers,
Henk
bzyzny
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Postby bzyzny » Mon Jun 20, 2016 10:55 am

Thanks, you both have some good tips. @kumar, thanks for the vote of confidence! the part about power initialization was especially helpful. I've not yet completed my schematic but once I do I'll definitely post it here for review. I'm in no hurry so will try to make sure I understand and quadruple check everything before buying components and such. Don't want to receive useless PCBs! The xSys connector does not look too hard to set up, I'm just glad the xtag programmer board is only $20, I've seen others that are $100+ (ie xilinx). Speaking of xilinx, that's where I've seen 2mm IDC connector before, on the Icarus bitcoin miner. Had to re-terminate the JTAG cable to make it fit. Whenever possible I prefer to use common standards for compatibility so will stick to 2.54mm pin headers. I'm sure I'll have more questions soon, and will post updates as I make progress.
bzyzny
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Postby bzyzny » Sun Jul 10, 2016 9:49 am

Ok, so I haven't had much time to work on this lately, so I've focused on tackling the power delivery aspect since that seems to be my biggest hurdle. Main reason I am planning not to mimic the setup used on the official dev board is that it uses QFN components. However I'm finding that limiting my search for a PMIC that has leads is making it difficult to find a suitable component. Here are a few components I'm considering:

http://www.ti.com/product/tps65580

https://www.exar.com/product/power-mana ... rs/xrp6668

http://www.monolithicpower.com/Products ... -down(Buck)/MP2149

I suppose I may be looking in the wrong direction, since I gather it may be necessary to use an LDO instead of buck converter for the 1V rail due to switching noise on a buck. I did see there are some PMICs that have 2 buck and 1 LDO in a single package, would that be the best choice? I was hoping I could use a single pmic to supply all three rails (1v, 3v3, and 5v). The 5v will only be going directly to the pin headers for expansion boards. Would it be acceptable to drive the 5v directly from the usb power? That way I could use a 2-output PMIC for 1v and 3v3 instead of a 3-output, which opens up more options. Any recommendations would be appreciated.
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Postby mon2 » Sun Jul 10, 2016 3:09 pm

The Exar device features a metal belly for the GROUND so this component may be impacted by your assembly process. Unless you have a hot plate or some other method to solder such a part then this regulator may not be suitable.
bzyzny
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Postby bzyzny » Sun Jul 10, 2016 3:29 pm

The xmos chip also has exposed ground pad, so I figure if I can do one, I can do another. My plan is to try with my hot airflow rework station and/or modified toaster oven. I would prefer to avoid using another exposed pad ic, if possible to keep things simple. I'm starting to see why the xmos engineers designed the reference board the way it is. Using a separate buck converter + LDO for each rail may be the way to go.
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Postby henk » Mon Jul 11, 2016 9:00 am

Hi Bzyzny,

I wouldn't use an LDO for the 1V supply - it will get toasty. Any DC-DC step down should do, e.g., AP3417C. The device runs at 500 MHz and that will introduce plenty of noise, so make sure the PLL has a filter as recommended per the data sheet.

VBUS - IIRC you only need to supply this if you are a host device. The VBUS input to the device is purely to monitor the presence of VBUS, so it is normally just connected to the VBUS pin of the USB connector. However, if you need to supply VBUS to the USB cable, then you will need to have a DC-DC that can produce 5V (or slightly above - not sure what the standard allows in terms of the drop over the cable).

The exposed paddles are there both to get good electrical connection (i.e., a low=inductance path for the decouplers to ground), and a good thermal connection (i.e., dissipating heat). Make sure there is a good number of vias beneath the ground paddle into the ground plane.

Cheers,
Henk
bzyzny
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Postby bzyzny » Sat Jul 30, 2016 10:13 am

Ok, so after a ton more research I feel I have a much better understanding of how to setup the power circuit. I've compared a bunch of dc regulators and settled on the Diodes AP3417C as recommended by Henk. Although the other options I looked had some advantages, this one seems to be good enough and is much lower cost, and for this first prototype the cost is the main factor. If anyone is curious, here are the runner ups:

Exar xrp6668
TI tps62420
MPS MP2149
TI lm3674
Richtek RT8035

Although not relevant to the AP3417C, I'm still curious about two things:

Some of the above support PFM/PSM for better efficiency at low loads, which seems preferable, but do these features increase noise or have any other aspects to consider? And how much does the switching frequency matter?

How much headroom does VDD need? The datasheet for the XL208 says max current on VDD is 375mA, but then the footnote says thats under typical conditions. I saw some other dc regulators that had 400mA output but I'm assuming that is cutting it too close. On a similar note, I didn't see a max current for VDDIO, but a rough estimate would indicate VDDIO would not use more than about 200mA (however 3v3 rail will also be routed to pin headers for expansion boards so I figure 1A supply is appropriate).

Anyways, now that I've decided on the DC/DC switching regulator I will use, it should (hopefully) not take me much longer to finish the schematic, which I will upload for review before starting the PCB layout.
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Postby henk » Mon Aug 01, 2016 4:17 pm

Hi

400 mA for VDD cuts it a bit fine I would think
200 mA for 3V3 may be enough, depending on what you are planning to do VDDIO wise.

Cheers,
Henk

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