Runtime Negotiation of Xlinks

Technical questions regarding the XTC tools and programming with XMOS.
rtimte
Junior Member
Posts: 7
Joined: Mon Mar 25, 2013 2:51 am

Post by rtimte »

pstnorpd,

No switching of modes... just use the static forward links to push the data alone using the address of the message. After initial negotiation all devices/chips will have a routing table with the link address of all other devices. So creating a message is just looking up the node in the routing table and use the address as the first part of the message. Then tile 0 of each device/chip either forward the message along using the first four bits of the address or routes the message to one of the tiles on the chip if this message is for this device. The master device is nothing more than the initiator of all the initial routing table setups as I needed to start with one device. Once the initial setup is complete any tile can send a message to any other tile in the network. Now each device/chip on the network has normal channel links from tile 0 to each of the other tiles on the device/chip. During testing I had 4 XK-1A's pinned together so no jumpers or LVDS, but I have 16 StartKit's with short jumpers connected. I have a bunch of DS90LV049's from National Semiconductor I was going to use to greater length's once the network was up and running.

When I set up the code and tested it I was using 4 XK-1A's with links setup in the XN file. The code used a hard coded routing tables as the network was static.

I tried to find documentation on the write_sswitch_reg function and only found this in the LS1 library documentation, but nothing on what to pass... oh well!

• int write_sswitch_reg(unsigned tileid, unsigned reg, unsigned data)

Writes a value to a system switch register.
The write is of the system switch which is local to the specified tile id. If a successful acknowledgement is received then 1 is returned. If an error acknowledgement is received or if the register number or tile identifier is too large to fit in the write packet then 0 is returned.
Parameters

o tileid
The tile identifier.

o reg
The number of the register.

o data
The value to write to the register.

Returns
Whether the write was successful.

I guess I will go back to using CAN bus with another chip manufacture. I liked the idea of the built in switch but without any documentation on how to configure it, kind of useless in a dynamic network. Thought about using some type of serial bus with the XMOS chips but the built in switch is what had me excited about the XMOS products.

The network was just a side project to get my initial project complete. Automotive electrical systems (power distribution modules, sensor input and logging, gauge drivers or LCD displays, switch input modules and fuel injection). I have all the above working with another chip manufacture using CAN bus to talk with each other. Have most of it ported over to the XMOS chips but using a static network.


rtimte
Junior Member
Posts: 7
Joined: Mon Mar 25, 2013 2:51 am

Post by rtimte »

forgot to say in all of the LS1 datasheets has a reference to (for ports 20-27,80-87 and A0-A7 the links are in (C, D, B, A, G, H, E, and F) order:

Node Configuration:
The digital node control registers can be accessed using configuration reads and
writes
(use write_node_config_reg(device, ...) and
read_node_config_reg(device,...) for reads and writes).

Number Perm Description
0x00 RO Device identification
0x01 RO System switch description
0x04 RW Switch configuration
0x05 RW Switch node identifier
0x06 RW PLL settings
0x07 RW System switch clock divider
0x08 RW Reference clock
0x0C RW Directions 0-7
0x0D RW Directions 8-15
0x10 RW DEBUG_N configuration
0x1F RO Debug source
0x20 .. 0x27 RW Link status, direction, and network
0x40 .. 0x43 RW PLink status and network
0x80 .. 0x87 RW Link configuration and initialization
0xA0 .. 0xA7 RW Static link configuration

D.12 Link status, direction, and network: 0x20 .. 0x27
These registers contain status information for low level debugging (read-only), the
network number that each link belongs to, and the direction that each link is part
of. The registers control links C, D, B, A, G, H, E, and F in that order.
Bits Perm Init Description
31:26 RO - Reserved
25:24 RO If this link is currently routing data into the switch, this field
specifies the type of link that the data is routed to:
0: plink
1: external link
2: internal control link
23:16 RO 0 If the link is routing data into the switch, this field specifies the
destination link number to which all tokens are sent.
15:12 RO - Reserved
11:8 RW 0 The direction that this this link is associated with; set for routing.
7:6 RO - Reserved
5:4 RW 0 Determines the network to which this link belongs, set for
quality of service.
3 RO - Reserved
2 RO 0 Set to 1 if the current packet is junk and being thrown away. A
packet is considered junk if, for example, it is not routable.
1 RO 0 Set to 1 if the switch is routing data into the link, and if a route
exists from another link.
0 RO 0 Set to 1 if the link is routing data into the switch, and if a route
is created to another link on the switch.
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segher
XCore Expert
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Joined: Sun Jul 11, 2010 1:31 am

Post by segher »

The XS1-L system specification
has everything you need. The information probably is part
of some other document these days, but I don't find the
documentation website any easier to navigate than you do :-P