Doc Improvement: XS1-port-to-pin-mapping(X7438D)

[JasonWhiteman]

Although the content is correct, I believe the documentation could be more clear by applying a common structure to the original bullet points.

Original (Page 1 - bottom of page):

· I/O on port p1 uses pins X2D02 to X2D09 and X2D49 to X2D70.
· I/O on port p2 uses pins X2D16 to X2D19; inputting from p2 results in undefined values in bits
0, 1, 6 and 7.
· I/O on port p3 uses pins X2D14, X2D15, X2D20 and X2D21; inputting from p1 results in
undefined values in bits 28-31, and when outputting these bits are not driven.

Problem statement:

Bullet #2 describes used external pins for the p2 port mapping and also lists the limitations of p2 (undefined values for p2).

Bullet #3 describes the external pins for the p3 port mapping - but shows limitations for p1 (not p3).

Last, the bullets are not listed in order of priority -- which would, in my opinion, be a more logical organization.

Suggested revision:

· I/O on port p3 uses pins X2D14, X2D15, X2D20 and X2D21. 4-bit port is narrowest port, so all 4 pins take priority to any other shared pin usage.
· I/O on port p2 uses pins X2D16 to X2D19; inputting from p2 results in undefined values in bits
0, 1, 6 and 7 since these bits are use pins shared with a narrower port (4C).
· I/O on port p1 uses pins X2D02 to X2D09 and X2D49 to X2D70. ; inputting from p1 results in
undefined values in bits 28-31, and when outputting these bits are not driven.

Regards,
Jason Whiteman

[sethu_jangala]

Hi Jason,

I think this document is out of date. I couldn't find the document in the website now. All the pin mapping information is available in the each device data sheet separately.

Sethu.