Ethernet Slice on Square

Technical questions regarding the xTIMEcomposer, xSOFTip Explorer and Programming with XMOS.
leutholl
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Ethernet Slice on Square

Postby leutholl » Tue Apr 18, 2017 11:24 pm

Hi

On a L2-Slice-Kit board, I managed to get the AN00122 (webserver) demo running. The port definition is correct for the CIRCLE slot. However, I would like to use the SQUARE slot and adapted the port configuration as much as I could but never succeeded.

Based on an older (back in 2010) post somebody referred to

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#define SMI_COMBINE_MDC_MDIO 1
#define SMI_MDC_BIT 0
#define SMI_MDIO_BIT 1
#define ETHERNET_DEFAULT_TILE tile[1]
#define PORT_ETH_RXCLK on tile[1]: XS1_PORT_1B
#define PORT_ETH_RXD on tile[1]: XS1_PORT_4A
#define PORT_ETH_TXD on tile[1]: XS1_PORT_4B
#define PORT_ETH_RXDV on tile[1]: XS1_PORT_1C
#define PORT_ETH_TXEN on tile[1]: XS1_PORT_1F
#define PORT_ETH_TXCLK on tile[1]: XS1_PORT_1G
#define PORT_ETH_MDIOC on tile[1]: XS1_PORT_4C
#define PORT_ETH_MDIOFAKE on tile[1]: XS1_PORT_8A
#define PORT_ETH_ERR on tile[1]: XS1_PORT_4D


but this doesn't fit the API of the Ethernet library the current sample uses (it expects ports and not #defines). In addition, what's MDIOFAKE good for? I understand that on the port map chart and on the slice kit daughter card sheet it says that some of the bits are overlayed and multi-bit SMI should be enabled in the library (I guess that

Code: Select all

#define SMI_COMBINE_MDC_MDIO 1
#define SMI_MDC_BIT 0
#define SMI_MDIO_BIT 1

does this?!

As of now, I have:

Code: Select all

#define ETHERNET_USE_SQUARE_SLOT
port p_eth_rxclk  = on tile[1]: XS1_PORT_1B; //XS1_PORT_1J on CIRCLE
port p_eth_rxd    = on tile[1]: XS1_PORT_4A; //XS1_PORT_4E on CIRCLE
port p_eth_txd    = on tile[1]: XS1_PORT_4B; //XS1_PORT_4F on CIRCLE
port p_eth_rxdv   = on tile[1]: XS1_PORT_1C; //XS1_PORT_1 on CIRCLE
port p_eth_txen   = on tile[1]: XS1_PORT_1F; //XS1_PORT_1L on CIRCLE
port p_eth_txclk  = on tile[1]: XS1_PORT_1G; //XS1_PORT_1I on CIRCLE
port p_eth_rxerr  = on tile[1]: XS1_PORT_4D; //(bit1) //XS1_PORT_1P on CIRCLE
port p_eth_timing = on tile[1]: XS1_PORT_8C; //CIRCLE good, SQUARE?

clock eth_rxclk   = on tile[1]: XS1_CLKBLK_1;
clock eth_txclk   = on tile[1]: XS1_CLKBLK_2;

port p_smi_mdio = on tile[1]: XS1_PORT_8A; // (bit0) //XS1_PORT_1M on CIRCLE
port p_smi_mdc  = on tile[1]: XS1_PORT_4C; // (bit1) //XS1_PORT_1N on CIRCLE


I don't know what to do with p_eth_timing and the p_smi_mdio and p_smi_mdc. I need to set these ports for the library to be happy.

So how are those ports supposed to be when I must use the SQUARE port?

Any help would be very much appreciated?

Thanks!
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mon2
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Postby mon2 » Wed Apr 19, 2017 4:53 am

Review this document:

https://www.xmos.com/support/boards?pro ... nent=19387

and select the XA-SK-ETH100 slice board on the bottom tab. Then review the mappings for the respective PCIe connector pins.

Also note the notes :)

In the SQUARE and STAR slots, the SMI interface is shared on a 4-bit port and should use the multi-bit SMI component in the Ethernet library.


and

https://github.com/xcore/sc_ethernet/bl ... /src/smi.h

* If SMI_COMBINE_MDC_MDIO is 1 then ``p_smi_mdio`` is omitted and ``p_mdc`` is
* assumbed to multibit port containing both mdio and mdc.
*


The SQUARE slot will require the:

Code: Select all

#ifndef SMI_COMBINE_MDC_MDIO
#define SMI_COMBINE_MDC_MDIO 1
#endif


and

Code: Select all

port p_eth_timing = on tile[1]: XS1_PORT_8A; //SQUARE - notes state any free port can be used here

// see page 13
// https://www.xmos.com/download/private/lib_ethernet-%5Buserguide%5D%283.3.0rc1%29.pdf
//

port p_smi_mdc  = on tile[1]: XS1_PORT_8B; //with SMI_COMBINE_MDC_MDIO=1


Not tested but the above is what I would try.
leutholl
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Postby leutholl » Wed Apr 19, 2017 2:03 pm

Thanks. I was aware of the documentation but struggled over the smi. This is how I got it working:

Code: Select all

#define ETHERNET_USE_SQUARE_SLOT
#ifndef SMI_COMBINE_MDC_MDIO
#define SMI_COMBINE_MDC_MDIO 1
#endif

port p_eth_rxclk  = on tile[1]: XS1_PORT_1B; //XS1_PORT_1J on CIRCLE
port p_eth_rxd    = on tile[1]: XS1_PORT_4A; //XS1_PORT_4E on CIRCLE
port p_eth_txd    = on tile[1]: XS1_PORT_4B; //XS1_PORT_4F on CIRCLE
port p_eth_rxdv   = on tile[1]: XS1_PORT_1C; //XS1_PORT_1 on CIRCLE
port p_eth_txen   = on tile[1]: XS1_PORT_1F; //XS1_PORT_1L on CIRCLE
port p_eth_txclk  = on tile[1]: XS1_PORT_1G; //XS1_PORT_1I on CIRCLE
port p_eth_rxerr  = on tile[1]: XS1_PORT_1D; //(bit1) //XS1_PORT_1P on CIRCLE
port p_eth_timing = on tile[1]: XS1_PORT_8A; //CIRCLE good, SQUARE?

clock eth_rxclk   = on tile[1]: XS1_CLKBLK_1;
clock eth_txclk   = on tile[1]: XS1_CLKBLK_2;

port p_smi  = on tile[1]: XS1_PORT_4C;  //with SMI_COMBINE_MDC_MDIO=1



and later in main:

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// MII/ethernet driver
    on tile[1]: mii(i_mii, p_eth_rxclk, p_eth_rxerr, p_eth_rxd, p_eth_rxdv,
                    p_eth_txclk, p_eth_txen, p_eth_txd, p_eth_timing,
                    eth_rxclk, eth_txclk, XTCP_MII_BUFSIZE);

    // SMI/ethernet phy driver
    // instead of this
    //on tile[1]: smi(i_smi, p_smi_mdc, p_smi_mdc);
    //on tile[1]: smi_init(smi);
    // do this:
    on tile[1]:   smi_singleport(i_smi, p_smi, 0, 1 );



Not 100% sure the RXERR is correct as it should be bit1 and I took XS_PORT_1D which I think starts on bit 0 - or is the library clever enough to take bit 1?

Also, the smi(...) had to be changed to smai_singleport(...) where the last two integers specify the bits of the overlayed port.

There is so much documentation but I really struggle to have a structure. Old architecture examples and docs and new ones are not compatible it seems, and the new samples are not as rich as some of the old ones (i.e. the gpio & ethernet sample on the slicekit. There was usage of I2C temp sensor in the old days but now has disappeared... why?)

Anyway thanks for the pointer!
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mon2
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Postby mon2 » Wed Apr 19, 2017 3:06 pm


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