AN10129 (1.0.1) - TDM speed

Technical questions regarding the xTIMEcomposer, xSOFTip Explorer and Programming with XMOS.
User avatar
XCore Addict
Posts: 209
Joined: Thu Nov 26, 2015 11:47 pm

Re: AN10129 (1.0.1) - TDM speed

Postby akp » Fri Mar 30, 2018 4:46 pm

Nicely done! EDIT: Does your TDM slave code include sync loss detect? Is there a way to make this efficient? The XMOS I2S slave code seems to lose some throughput due to its syncerror detection (e.g. 3i/3o for slave vs 4i/4o for master IIRC).
User avatar
XCore Legend
Posts: 1118
Joined: Thu May 27, 2010 10:08 am

Postby infiniteimprobability » Tue Apr 03, 2018 7:56 am

I actually have 32 channels @ 96kHz in and out as TDM slave working fine in the simulator. I used 4 x 4-bit port2 and I4S on each data line (bit clock is now 12.5Mhz instead of the more challenging 25 Mhz). I ended up having one task dedicated ot i/o and another task that does the zip/unzip and a small amount of processing. I use a shared memory block declared in .asm to support simple pingpong

I have to say, good work!

I know in theory I could use movable pointers and swap operations, but it seemed simpler just to use a block of memory.

Yes, often the way and when dealing with the last few cycles, it's nice to be sure exactly what instructions are being excuted. As long as one side writes and the other side reads (and you know when values change) then a piece of shared memory effectively gives you a multi-channel shallow lockless FIFO.
Active Member
Posts: 35
Joined: Wed Dec 18, 2013 9:20 pm

Postby stdefeber » Thu Dec 06, 2018 4:13 pm

Apologies to dig up this older thread.

I need a TDM interface with 8 channels, 32-bit at 192KHz.
Which results in a 49.152 MHz bit clock.

I have looked at the IO ports and clock block datasheets and found no real evidence that this could not work.
Could please anyone prove me wrong ? (because of missed info or personal experience)



Who is online

Users browsing this forum: No registered users and 36 guests