Unable to Program I2C PLL from XUE216

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Fabien
Junior Member
Posts: 4
Joined: Fri Mar 09, 2018 4:16 pm

Unable to Program I2C PLL from XUE216

Postby Fabien » Thu Aug 09, 2018 3:20 pm

Hi everyone,

I built a custom board around a XUE216 chip, a good part of the design is based on the reference designs for the same chip. I have the same PLL (CS2100) for the low jitter clock as on the microphone array dev board. it's programmed via I2C, and it's connected to a 4bit port on the chip ( see schematic ). My problem is when I I try to program the chip, it never works. I only get NACKs back. The signal looks good, within the requirements of the chip, the address looks good and still it never responds. I don't know what I'm doing wrong, my code is similar to the one from the examples.. Any help is appreciated, I've attached a scope view as well as schematics.

Thank you!
Fabien.

I2C init call

Code: Select all

//I2C configuration
port p_i2c = XS1_PORT_4A;
i2c_master_if i2c[1];
 par
 {
      i2c_master_single_port(i2c, 1, p_i2c, 80, 0, 1, 0xc);
      configure_pll(i2c[0]);
 }


pll init function

Code: Select all

void configure_pll(client i2c_master_if i2c)
{
   unsigned int delay_in_ms = 500;
   i2c_regop_res_t ret;

   uint8_t cs2100_regAdd[5] = {0x02, 0x03, 0x05, 0x17, 0x02};
   uint8_t cs2100_regVal[5] = {0x01, 0x00, 0x00, 0x10, 0x00};
   uint8_t pll_address_w = 0x9c>>1; //device address is 100111 | 0 | 0 <- AD0 value and last zero for write mode. Not sure why I need to shift it to get the right address out...

   for(int i = 0; i < 5; i++)
   {
       ret = i2c.write_reg(pll_address_w, cs2100_regAdd[i], cs2100_regVal[i]);
       if(I2C_REGOP_SUCCESS == ret)
           printf("success: %d \n", ret);
       else if(I2C_REGOP_DEVICE_NACK == ret)
           printf("NACK: %d \n", ret);
       else
           printf("incomplete: %d\n", ret);
   }
}
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mon2
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Posts: 1166
Joined: Thu Jun 10, 2010 11:43 am
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Postby mon2 » Fri Aug 10, 2018 12:22 pm

Hi. Wow, took about an hour on this review but have not had my morning strong tea yet :)

From the applied lib_i2c for multi-port as master, the I2C instantiation appear to require the SCL pin definition first and then the SDA. Your schematic is reversed from how XMOS applies the same library and physical port pin use.

So try with:

Code: Select all

//I2C configuration
port p_i2c = XS1_PORT_4A;
i2c_master_if i2c[1];
 par
 {
      i2c_master_single_port(i2c, 1, p_i2c, 80, 1, 0, 0xc); // reverse the bit weights to match your schematic for SCL and SDA functions
      configure_pll(i2c[0]);
 }


Summary:

a) the first parameter is the SCL pin but in your design, the IP is toggling your SDA pin instead
b) the 2nd parameter is the SDA pin but in your design, the IP is toggling your SCL pin instead

Please post your results.

Q: The value of 80 would imply 80khz. Any reason for this value? You could certainly make the I2C speed slower to suit but would think that 100 is also ok (ie. 100khz for the SCL clock speed).
User avatar
Fabien
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Posts: 4
Joined: Fri Mar 09, 2018 4:16 pm

Postby Fabien » Fri Aug 10, 2018 3:10 pm

Hi Mon!
Thank you for your help.
I can't believe I didn't see that one, and I've had my tea this morning!

It works now.
There was no reason to use 80 kbits, it's just that I wanted to slow it down to make sure it was well under the recommended max specs!

Thank you!

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