Disable I2C on xCore 200 Audio Platform, please help

Technical questions regarding the xTIMEcomposer, xSOFTip Explorer and Programming with XMOS.
rostec
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Disable I2C on xCore 200 Audio Platform, please help

Postby rostec » Tue Nov 27, 2018 5:18 pm

I am programming the xCore 200 development board with xtime composer, configuration 2i10o10xxxxxx. The board and software works beautifully, but I need to configure my AD and DA converters with external hardware, so I need to disable I2C from the XE216-512.
I have tried tons of ways, and it always ends up badly. It's a pain to find your way in another persons program. Please, can anybody help with a solution, direction or tips. Anything would be much appreciated.
Best regards
Knud Rosenskjold
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mon2
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Postby mon2 » Wed Nov 28, 2018 1:26 pm

Hi. In this IP, the XMOS CPU is the I2C master but do you know if the I2C master performs only a power up initialization and then sits idle after a period of time? If yes, then you could simply wait for the I2C master to complete its task and then assert your external I2C master to alter the I2C registers on the slave device to suit? Being open drain concept with I2C, multiple I2C masters could and should be able to work together.

This way, you are not breaking any of the working IP.

Plan B is to review the I2C master thread and disable as required. However, once you do this, you must leave the respective I2C lines to be in INPUT mode so that you are not driving the same I2C pins which will prevent your external I2C master from working. By power on default, believe that is the case on the XMOS devices to be in input mode but does not hurt to throw in a few lines of code to be sure.

Do you have I2C bus analyzer? Is your external I2C master unable to control the same I2c devices onboard this kit? Also, are you sure that the proper I2C device addresses are being used during this review?
rostec
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Postby rostec » Wed Nov 28, 2018 4:43 pm

Hi Mon2. Thanks for the reply.
I am not using I2C at all. The external hardware controlling the AD, DA, AES XMTR, AES RECEIVER, is running the chips in hardware mode, so I just left the I2C from the XMOS CPU floating. My problem was, when I changed SR frq. on the host, the system froze. But instead of trying to modify a perfect stable piece of software and risking instability, I found a simple workaround: I simply changed the NACK setting in i2c_config.h from 2000 to 1. That did the trick.

My problem arose from the simple fact, that the XMOS CPU waited 2000 times at each register write for an ACK that never came. The I2C CLK is 100 kHz, i.e a clock cycle of 10 us. One register write is 3x9 bits, and with 2000 NACK this is 540 ms waiting time per write! There is a total of 39 register writes, which means the circuit appears to be frozen for 21.06 seconds! Of course, the host detects this as a dead device, and in order to enable it again, it has to be re-enumerated.

It was pretty simple actually. I hope others can use this information. I am a little bit embarrassed. Too much stress, I guess.
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mon2
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Postby mon2 » Thu Nov 29, 2018 4:58 pm

Thank you Rostec for your excellent post and thread closure! Clever work around :)

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