XE232-1024 Tile 3 RGMII Interface

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XE232-1024 Tile 3 RGMII Interface

Postby davidk » Mon Oct 30, 2017 4:54 pm

XE232-1024-FB374 Tile 3 RGMII Issue

ISSUE: Can not seem to enable the RGMII TX interface.
Q1) What is the correct method/sequence to configure/enable the RGMII TX interface?
Currently acts as if the RGMII TX is not enabled.

Went through documentation and code examples and cannot seem to identify what is being over looked.
Code examples are for the XE216 on TILE 1 not TILE 3.
Standard hardware verification; power supplies within tolerance, same with Vripple, no XE232 to PHY PCB open or shorts and I/O signal mapping from XE232 to PHY.
XE232 controlled PHY reset timing and operation are as expected.
MDIO, MDC communication works between XE232 and TI PHY DP83867IRRGZT.
TI PHY DP83867IRRGZT auto negotiates with router and sends RX traffic to XE232.
Verified DP83867IRRGZT RX to XE 232 timing is as expected, running at 125MHZ.

20171031 Update:
Found default generated xn file enabled both USB ports. Once disabled USB gained some Ethernet control.
Verified received RX comm from PHY to RGMII are as expected.
Still cannot get RGMII TX to work.

20171107 Update:
Worked through the issues which bring this post to its conclusion.
Last edited by davidk on Tue Nov 07, 2017 1:03 pm, edited 1 time in total.
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Postby mon2 » Sat Nov 04, 2017 5:15 pm

Please post your xn file and schematics for the Ethernet section with xmos pin mapping for review. Also xmos code that maps the pins to ethernet hardware will be helpful.
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Postby davidk » Tue Nov 07, 2017 1:04 pm

Thank you for the offer to review. Worked through the issues and Ethernet is operational. This brings this post to a conclusion.

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