Porting USB Audio 2.0 for XU208-128-TQ64 / build warnings

Sub forums for various specialist XMOS applications. e.g. USB audio, motor control and robotics.
anhn@nytec.com
Member
Posts: 14
Joined: Thu Apr 13, 2017 4:50 pm

Porting USB Audio 2.0 for XU208-128-TQ64 / build warnings

Postby anhn@nytec.com » Thu Apr 13, 2017 7:22 pm

I am trying to port the XMOS USB 2.0 Audio reference software onto a XU208-128-TQ64. I get the following warnings/errors:

xmap: Warning: More than 6 cores used on a tile. Ensure this is not the case on tile running XUD.
xmap: Warning: port "XS1_PORT_1F" on tile[0] is not connected to any pins in this package.
xmap: Warning: port "XS1_PORT_1G" on tile[0] is not connected to any pins in this package.
xmap: Warning: port "XS1_PORT_1E" on tile[0] is not connected to any pins in this package.
xmap: Warning: port "XS1_PORT_1H" on tile[0] is not connected to any pins in this package.
xmap: Warning: port "XS1_PORT_1J" on tile[0] is not connected to any pins in this package.
xmap: Warning: port "XS1_PORT_1K" on tile[0] is not connected to any pins in this package.
xmap: Warning: port "XS1_PORT_1I" on tile[0] is not connected to any pins in this package.
xmap: Warning: port "XS1_PORT_4A" on tile[0] is not connected to any pins in this package.

1) According to the datasheet and port mapping, these pins do not exist for the XU208-128-TQ64 chip.
2) for the "more than 6 cores used" warning, i'd place the call to "set_core_high_priority_on()" in main.xc per AN01027 per I'm still getting this warning.

any way to resolve these issues? thanks for any help.
User avatar
infiniteimprobability
XCore Expert
Posts: 801
Joined: Thu May 27, 2010 10:08 am
Contact:

Postby infiniteimprobability » Tue Apr 18, 2017 11:23 am

Hi,
regarding 1) - Yes that warning is generic and just tells you that a number of the ports instantiated do not come out to physical pins. The ports are used by sc_xud and get connected to the PHY on chip. The warnings should probably be suppressed in this case as we don't care the physical pins are brought out but the tools are not clever enough to spot that right now.

For 2) - again it's naive warning which dates back to XS1 where priority scheduling was not available. That setting is run-time so it's hard for the tools to be clever about. As long as sc_xud is getting it's 80+ MHz (as per the app note) then this warning can be ignored in your case. Whether or not this warning should remain is a matter for debate..
anhn@nytec.com
Member
Posts: 14
Joined: Thu Apr 13, 2017 4:50 pm

Postby anhn@nytec.com » Wed Apr 19, 2017 6:42 pm

thank you for the reply.
anhn@nytec.com
Member
Posts: 14
Joined: Thu Apr 13, 2017 4:50 pm

Postby anhn@nytec.com » Wed Apr 19, 2017 7:19 pm

I don't have my quad flash connected yet, but I am able to download sw in debug mode. sw is loaded and appears running on my custom hardware using a XU208 and the reference design per the xCORE-200 multichannel audio platform v2.0 hardware . when I suspend the debug sw, it's stuck in the same place in InitPorts() in audio.xc at the "p_lrclk" line. This does not seem correct. it does not seem to be getting out of this initialization, thus USB is not able to enumerate. thanks for any help

#pragma xta endpoint "divide_1"
p_lrclk <: 0 @ tmp;
tmp += 100;
User avatar
infiniteimprobability
XCore Expert
Posts: 801
Joined: Thu May 27, 2010 10:08 am
Contact:

Postby infiniteimprobability » Thu Apr 20, 2017 8:54 am

Code: Select all

p_lrclk <: 0 @ tmp;


this line is saying "output the value 0x00000000 and grab the 16b time stamp from the port and write into tmp". p_lrclk is a 1b port with a 32b buffer so outputs each bit on each port clock.

When XMOS is the I2S master, lrclk port is clocked from BCLK which is divided down from MCLK inside the clock block. So my best guess is either:

- MCLK is not present
- You have set the CODEC_MASTER define which means the XMOS chip is expecting the DAC to provide the BCLK and LRCLK

USB will not enumerate if the audio section gets blocked - control transactions from the host to the audio section are fully acknowledged so will timeout if audio is not responsive
anhn@nytec.com
Member
Posts: 14
Joined: Thu Apr 13, 2017 4:50 pm

Postby anhn@nytec.com » Thu Apr 20, 2017 6:26 pm

Where are the definition of the ports defined? For example, where is XS1_PORT_1N and XS1_PORT_4D defined? And can I use 2-bit, 4-bits, etc ports as 1-bit port? For example, can I use the 4-bit XS1_PORT_4D as individual 1-bit ports? if so, how can this be done?
anhn@nytec.com
Member
Posts: 14
Joined: Thu Apr 13, 2017 4:50 pm

Postby anhn@nytec.com » Thu Apr 20, 2017 7:27 pm

A follow up on the last reply. For example, can I use port 4D1 for MCLK and if so how do I define that on the .xn configuration file.
anhn@nytec.com
Member
Posts: 14
Joined: Thu Apr 13, 2017 4:50 pm

Postby anhn@nytec.com » Fri Apr 21, 2017 12:45 am

another thing. does the MCLK needs a precise clock of 24.576 MHz for the reference USB audio sw to work or is using the fixed 24MHz input clock fed to MCLK pin work as well?

thanks,
User avatar
infiniteimprobability
XCore Expert
Posts: 801
Joined: Thu May 27, 2010 10:08 am
Contact:

Postby infiniteimprobability » Fri Apr 21, 2017 9:18 am

Where are the definition of the ports defined? For example, where is XS1_PORT_1N and XS1_PORT_4D defined? And can I use 2-bit, 4-bits, etc ports as 1-bit port? For example, can I use the 4-bit XS1_PORT_4D as individual 1-bit ports? if so, how can this be done?


The xn file in sw_usb_audio src/core. The xn file gets turned into an include file platform.h at compile time. main.xc in sc_usb_audio is where most of them are instantiated.

or example, can I use port 4D1 for MCLK and if so how do I define that on the .xn configuration file.

No - 1b ports have special properties like being able to be used as clock input/output. So it must be a 1b port for clock input

another thing. does the MCLK needs a precise clock of 24.576 MHz for the reference USB audio sw to work or is using the fixed 24MHz input clock fed to MCLK pin work as well?

The audio (I2S) subsystem divides down MCLK for BCLK generation and it needs to be an even integer divide from MCLK to BCLK. You can use a 24MHz clock, as long as you can tolerate all of your sample rates being shifted by 0.9765625..
anhn@nytec.com
Member
Posts: 14
Joined: Thu Apr 13, 2017 4:50 pm

Postby anhn@nytec.com » Fri Apr 21, 2017 9:25 pm

I have a 24Mhz to clk and MCLK pins of the XMOS. I am getting BCLK. but I am not getting USB enumeration ie I have Thesycon USB audio control panel app running to detect USB audio device and it is not indicating that USB audio device is connected. I referenced the USB enumeration thread in this forum and checked all the things that were pointed out in the thread and all is correct on my board ie power, ground and (43R2 on pin 24). when the USB is connected i get a pop window saying the "USB device is not recognized. The last USB device you connected to this computer malfunctioned and windows does not recognize it."

Return to “Applications”

Who is online

Users browsing this forum: No registered users and 8 guests