Chaining the startKIT

All technical discussions and projects around startKIT
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Folknology
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Post by Folknology »

pstnotpd wrote:B.t.w. does it also pinout the JTAG, because that's what I actually need.
Unfortunately the Patchslice currently omits A1 and B1 (MSEL & Debug on Square slot) of the PCIe connector. However it may be possible to include these pins if they are useful (I hadn't considered their use for my own applications).

regards
Al


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segher
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Post by segher »

pstnotpd wrote:So using TP1 it should be possible to setup the JTAG chain to a number of startKITs?
The JTAG chain, sure. I doubt the usual debugger software
will handle it though: on a single startkit it hides the first
core (that it runs on itself), and the analogue tile. If you
feel like experimenting you can see what it does when you
chain another startkit; if you're lucky it could for example
show the second board as containing a plain SU2, if you're
unlucky it does not work at all. But you could always just
use an external JTAG debugger thing.
Unfortunately I found that the JTAG signals on the slicekit coreboard are only connected to the PCIe and not to the header.
You mean on the "square" (or what is it; top right) connector?

Wrt 5w links... They work, with any cable length, if you run
them slow enough. But what's the point then, if you could
run a 2w link significantly faster. Four wires is a lot easier
to deal with than ten, anyhow ;-)

I wish there were LVDS links, now that would be cool!
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Folknology
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Post by Folknology »

segher wrote:I wish there were LVDS links, now that would be cool!
+1 for LVDS links built into Xmos chips

(low cost tile addition?)

regards
Al
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pstnotpd
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Post by pstnotpd »

Just ordered some extra startkits so we'll see how this works out ;o)
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pstnotpd
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Post by pstnotpd »

Well, after some hefty soldering (I'm really not very good) I've tried out chaining the startkit JTAG but it does not seem to work.

Connected up as follows

Code: Select all

1  G  (GND)    --- 1  G  (GND)
2  5  (5V)     --- 2  5  (5V)
3  33 (3V3)    --- 3  33 (3V3)
4  M  (MSEL)   --- 4  M  (MSEL)
5  I  (TDI)    --- 9  O  (TDO)
6  S  (TMS)    --- 6  S  (TMS)
7  K  (TCK)    --- 7  K  (TCK)
8  D  (DEBUG)  --- 8  D  (DEBUG)
9  O  (TDO)    --- 5  I  (TDI)
10 R  (RST)    --- 10 R  (RST)
11 G  (GND)    
12 H  <NC>
13 G  (GND)
The TDO -> TDI and vice versa is done because that's how it appears to be done on the slicekit square & chain connectors.

When doing an xrun -l it sees the startkit as an adapter, but no devices attached.

Are these connections correct? If so how can I verify the first board "sees" the second?
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segher
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Post by segher »

pstnotpd wrote:The TDO -> TDI and vice versa is [...]
... is wrong.

Assuming that right column is an XSYS?
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pstnotpd
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Post by pstnotpd »

Folknology wrote: P.P.P.S. A sneak peak of the new A series slice kit seems to indicate a return to an IDC XSYS chaining connector to make physically daisy chaining these feasable (due to position of analogue slice)?
It looks like the IDC XSYS connector has gone MIA
dhalbakken
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Post by dhalbakken »

pstnotpd, did you ever try rewiring TDI and TDO and get the chaining to work?
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pstnotpd
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Post by pstnotpd »

dhalbakken wrote:pstnotpd, did you ever try rewiring TDI and TDO and get the chaining to work?
I did do the rewiring. Unfortunately the startkits won't boot from the XTAG in this way, which is related to the OTP setup on the startkit. I haven't figured out a way to circumvent this, but perhaps it's possible. I was pondering a dynamic link setup scheme in the startcluster, but again I got sidetracked.

With Sethu's example you can then actually use the 2nd (debug) tile on the startkit.

When not booting from the JTAG, it is possible to "see" all tiles using an XTAG2 connected to TP1, including the hidden debug one, in the debugger on the JTAG chain. So apart from the actual booting from JTAG other functionality seems to work through TP1. (assuming this question was triggered by your "flash" question in the Q&A)
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