XMOS的Endpoint的是如何实现802.1AS的时钟恢复的?

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Heirun
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XMOS的Endpoint的是如何实现802.1AS的时钟恢复的?

Postby Heirun » Tue Mar 29, 2016 11:12 am

Hello:
大家好,我像请教一下XMOS的Endpoint是如何实现时钟同步的?在代码中有看到端-端的延时测量,但没弄明白是如何起作用的,比如说在测量延时之后是如何调整本地时钟让其同步到主时钟?还有在listener端接收到的媒体数据包中的时间戳是如何起作用的?之前好像有看到过时钟恢复这一说,那具体的时钟恢复是如何进行的呢?

非常感谢您的任何指点。谢谢!
peter
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Postby peter » Fri Apr 01, 2016 3:52 pm

XMOS implements clock recovery in a similar manner to that described in the standards. The best description of how this works that I am aware of can be found in the following document:

http://www.ieee802.org/1/files/public/d ... d-0903.pdf
Heirun
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Postby Heirun » Mon Apr 11, 2016 9:39 am

peter,谢谢你的回答,还有我想请问802.1AS的时钟同步指的是什么时钟的同步呢?是采样时钟吗?另外,当我将两台Endpoint的采样率改成44.1KHZ时通信不正常,采样时钟一直有漂移无法锁定(这里我有将switch去掉而进行的直连)不知是什么原因。
谢谢你的任何帮助。
peter
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Postby peter » Mon Apr 11, 2016 1:50 pm

My understanding of your question is that you are unable to get the clocks to lock when you are running at 44.1kHz, even when you use a direct connection with no switches.

Can you tell me what version of the AVB software you are using, what hardware (XMOS LC or DC) and what version of the tools you are using.
Heirun
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Postby Heirun » Tue Apr 12, 2016 7:28 am

我使用的软件版本是AVB-Endpoint-software(6.1.1),硬件是XR-AVB-LC-BRD,工具使用的是13.2.0的xTIMEcomposer。另外,我所说的改变采样率仅仅只是在main.xc文件中将
const unsigned default_sample_rate = 48000 改成了const unsigned default_sample_rate = 44100,
这样子做可能并不正确,是否需要改动其他的地方?而我去掉switch直连的目的是想让整个系统的主时钟变成其中一个Endpoint(当然在我进行这个过程之前是进行了connect的,在有switch的系统中主时钟选择的是switch),也就是在发现master clock丢失后会很快确定新的master clock,并且就是其中的一个Endpoint。
peter
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Postby peter » Wed Apr 13, 2016 9:51 am

I can confirm that I am also seeing that the system does not lock clocks at 44.1kHz. However, the problem is not obvious yet. I will continue to look into this, but I may not be able to find the solution until I can speak to my colleague next week.
Heirun
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Postby Heirun » Fri Apr 15, 2016 3:15 am

谢谢你,期待你的好消息!另外我还想请教一下,在测量时钟偏差与路径延迟的Sync、Follow_Up以及其他的一些包的发送与接收时间是以哪个时钟为基础的呢?频率又是多少呢?
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larry
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Postby larry » Wed Jul 27, 2016 4:38 pm

I can confirm that media clock fails to achieve lock when default_sample_rate is changed to 44.1kHz. Presentation and actual timestamps increment continuously, but have several milliseconds apart and fluctuating. There is no obvious reason why, both are PTP synced and generate a stable local word clock.

Have you tried version 7? This is available on XMOS website as "AVB/TSN LIBRARY". I checked and 44.1kHz works using code from app note AN00202, which is the example application included in version 7.

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