The XEF216 datasheet indicates that RX_CLK needs to be low when the xCORE comes out of reset (section 11 / RGMII and section H.5 / RGMII Interface) but doesn't indicate why this is necessary. Is this functioning as a strap pin to automatically enable the RGMII interface at boot? If this is the case, and if the state of RX_CLK can't be guaranteed when reset is released, can the interface be enabled later in software via processor status 2 / bit 8 (this seems to be what lib_ethernet does anyway)?
Thanks!
Function of RGMII RX_CLK at reset
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chouston00
- Junior Member
- Posts: 5
- Joined: Thu Feb 25, 2016 11:12 pm
Hi,
RX_CLK has no function on reset; but it must be low as per the datasheet.
You may be able to set the state by keeping the RGMII PHY in reset.
Cheers,
Henk
RX_CLK has no function on reset; but it must be low as per the datasheet.
You may be able to set the state by keeping the RGMII PHY in reset.
Cheers,
Henk