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SPI bit ordering

Posted: Wed May 16, 2018 7:44 am
by psupine
I'm playing with the Explorer-200 board and an OLED display over the SPI, and am looking at the SPI library documentation (SPI 3.0.2).

The mode diagrams on pages 2-3 show MSB first, but the <<spi_master_if>> description on page 18 specifies LSB first. Can anyone tell me which is correct?

Re: SPI bit ordering

Posted: Thu May 17, 2018 1:21 am
by psupine
I'm answering my own question here, in the hope it might be useful for someone else searching the forum like I did.

I looked at the library code. The SPI library function explicity bit reverses the data that is passed to it before it send it to the port shift register. That means if I want to use the SPI library I'd have to first bit reverse my data for the library function to then bit reverse it back again. That seems pretty dumb to me, so I'll just talk to the port directly.

Re: SPI bit ordering

Posted: Thu May 17, 2018 4:45 am
by mon2
Please review appnote AN00160: How to use the SPI library as SPI master and related demo source code:

https://www.xmos.com/support/appnotes/AN00160

This project will run in the simulator.

Also review:

https://www.allaboutcircuits.com/techni ... interface/

http://www.xcore.com/viewtopic.php?t=1617

Code: Select all

reversed_value = bitrev(value_to_send); // could be used to reverse any data if required
Personally would just experiment and confirm the operation with your OLED display.

Re: SPI bit ordering

Posted: Fri May 18, 2018 5:45 am
by psupine
Ah hah!

The shift register at the port is natively LSB first. So the bitrev call in the spi library function makes this MSB first. Now I know.

Re: SPI bit ordering

Posted: Tue May 22, 2018 7:28 am
by psupine
On a related question while using AN00160 ...

The SPI doco (XM006232) in Section 2.5 talks about disabling optional data lines. In my particular case there is no readback available on the SPI. I'm using the blocking synchronous version of master mode, so I would have thought I could replace the p_miso port with null.

Code: Select all

int main(void) {
  interface spi_master_if i_spi[1];
  par {
    on tile[0]: app(i_spi[0]);
    on tile[0]: spi_master(i_spi, 1,
                           p_sclk, p_mosi, null, p_ss, 1,   // was "p_sclk, p_mosi, p_miso, p_ss, 1,"
                           null);
  }
  return 0;
}
I looked at the header and body definitions of spi_master and it does indeed show that the p_miso parameter is nullable. However when I modified the source as above and tried to build, I get this following error
Creating AN00160_using_SPI_master.xe
F:/XMOS Projects/workspace/lib_spi/src/spi_sync.xc: Error: Type of symbol `_Sspi_master_0.init.0' has mismatch with previous definition:
found: `[[distributable]] [[combinable]] void _Sspi_master_0.init.0(unsigned int *unsafe , server interface spi_master_if[1], buffered out port:32, buffered out port:32?, buffered in port:32?, out port[])' in file `F:/XMOS Projects/workspace/lib_spi/src/spi_sync.xc'
previous: `[[distributable]] [[combinable]] void _Sspi_master_0.init.0(unsigned int *unsafe , server interface spi_master_if[1], buffered out port:32, buffered out port:32?, out port[])' in file `../src/main.xc'
xmake[1]: *** [bin//AN00160_using_SPI_master.xe] Error 1
xmake: *** [bin//AN00160_using_SPI_master.xe] Error 2
I'm sure it's some stupid thing. What am I doing wrong? Thanks in advance.

Re: SPI bit ordering

Posted: Tue May 22, 2018 12:58 pm
by mon2
Please try the following:

Code: Select all

    on tile[0]: spi_master(i_spi, 1,
                           p_sclk, p_mosi, NULL, p_ss, 1,
                           null);
Replace null with NULL

Re: SPI bit ordering

Posted: Tue May 22, 2018 11:00 pm
by psupine
Thanks mon2.

That was not at all obvious, and it did the trick. In the XC spec, "null" is defined as a keyword and appears as lower case in all the doco.

Re: SPI bit ordering

Posted: Tue May 22, 2018 11:14 pm
by mon2
I think some of these typos are real life suckers (aka Vulcan Mind Melds).

Please consider to raise the typo via a support ticket on xmos.com to refine this documentation. Also saw assorted word typos inside the same appnote that are a personal pet peeve. Without a doubt we all make typing errors but a quick check with the word processor would be helpful to catch the random typing on the keyboard.

Glad that you can move forward on the project.

Re: SPI bit ordering

Posted: Wed May 23, 2018 12:06 am
by psupine
I tried to raise a bug report and the tracking system rejected it automatically. I'm not sure if this was because of something I did or whether all bug reports marked "Community Edition" are dismissed with such ruthless efficiency.