Can 1.536MHZ PDM clock generate 16kHz output sample rate Topic is solved

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xyx361100238
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Posts: 6
Joined: Mon Dec 12, 2016 3:31 am

Can 1.536MHZ PDM clock generate 16kHz output sample rate

Postby xyx361100238 » Thu Dec 15, 2016 4:25 am

Hi, all
According the Microphone array library V2.0.0 manual,feature 1&2:
1、48kHz, 24kHz, 16kHz, 12kHz and 8kHz output sample rate by default (3.072MHz PDM clock),
 2、44.1kHz, 22.05kHz, 14.7kHz, 11.025kHz and 7.35kHz output sample rate by default (2.8224MHz PDM clock)
Is this means I cann't generate 16kHz sample rate output through 1.536MHZ(half of defualt) PDM clock?If it can be, how to modify src code.
THX!
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andrew
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Joined: Fri Dec 11, 2009 10:22 am

Postby andrew » Thu Dec 15, 2016 10:43 am

In order to set up the mic_array library for a 1.5MHz PDM clock and 16kHz output sample rate you need a total decimation factor of 32x3 = 96. This is not by default supported, however, if you read the advanced filter design section of the docs then it explains that you can generate any output decimation factor you desire. The script is currently being updated to make it easier to use but for now you should be able to achieve the result you want with:

python fir_design.py --add-third-stage 3 0.42 0.52 my_decimator

to generate a filter that will do a final stage divide by three. Hope this helps. Let me know if you have any problems as I tested it on 'not version 2.0.0'
xyx361100238
Junior Member
Posts: 6
Joined: Mon Dec 12, 2016 3:31 am

Postby xyx361100238 » Mon Dec 19, 2016 3:55 am

THX,andrew
According to your cmd,I generate a filter divide by 3,and it works,thx a lot.

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