Mode-0 SPI question

[matrix]

hi all,

I was trying to modify the XMOS spi master code to Mode 0, but failed.

The only way I found was to use the clocks independently and to add a delay
to one clock, but I don't like this approach.

What is a better way to do it ?

Matrix

Code: Select all

#include <xclib.h>
#include <platform.h>

out buffered port:8 sclk = XS1_PORT_1A ;
out buffered port:8 mosi = XS1_PORT_1B;
in buffered port:8 miso = XS1_PORT_1C;

clock blk1 = XS1_CLKBLK_1 ;
clock blk2 = XS1_CLKBLK_2 ;


void main()
{
	
	configure_clock_rate (blk1 , 100 , 8);
	configure_clock_rate (blk2 , 100 , 16);
	configure_out_port(sclk, blk1, 0);
	configure_out_port(mosi, blk2, 0);
	configure_in_port(miso, blk2);
	clearbuf(mosi);
	clearbuf(sclk);
	
	set_clock_rise_delay(blk1, 20);
	set_clock_fall_delay(blk1, 20);

	start_clock(blk2);
	start_clock(blk1);

	mosi <: 0xaa;
    sclk <: 0x55;
	sclk <: 0x55;
	sync(sclk);

	miso :> void;
	
	while(1);
	return 0;
}

[matrix]

forgot to mention, the clocks must also be restarted
after each transfer or it goes out of sync.

Code: Select all

#include <xclib.h>
#include <platform.h>

out port debug=XS1_PORT_8D;
out buffered port:8 sclk = XS1_PORT_1A ;
out buffered port:8 mosi = XS1_PORT_1B;
in buffered port:8 miso = XS1_PORT_1C;

clock blk1 = XS1_CLKBLK_1 ;
clock blk2 = XS1_CLKBLK_2 ;


void main()
{
    unsigned char loopback;
	configure_clock_rate (blk1 , 100 , 8);
	configure_clock_rate (blk2 , 100 , 16);
	configure_out_port(sclk, blk1, 0);
	configure_out_port(mosi, blk2, 0);
	configure_in_port(miso, blk2);
	clearbuf(mosi);
	clearbuf(sclk);

	set_clock_rise_delay(blk1, 32);
	set_clock_fall_delay(blk1, 32);

    
	for(int i=0;i<5;i++)
    {
    start_clock(blk2);
    clearbuf(miso);
    clearbuf(mosi);
    start_clock(blk1);

    mosi <: 0xaa;
    sclk <: 0x55;
    sclk <: 0x55;
    sync(sclk);
    miso :> loopback;

    stop_clock(blk1);
    stop_clock(blk2);
    debug<:loopback;
    }

    while(1);
	return 0;
}

[matrix]

Anyway, I don't think that the code above is a good
idea. The order of statements matters, and with the
next compiler version the timing might break.

[matrix]

ooops... sorry guys didn't see the easy way..

Code: Select all

include <platform.h>

out buffered port:32 sclk = XS1_PORT_1A ;
out buffered port:8 mosi = XS1_PORT_1B;
in buffered port:8 miso = XS1_PORT_1C;
out port cs = XS1_PORT_1D;

clock blk1 = XS1_CLKBLK_1 ;
clock blk2 = XS1_CLKBLK_2 ;

int main()
{

	configure_clock_rate(blk1, 100,8);
	configure_out_port(sclk, blk1, 0);
	configure_clock_src(blk2, sclk);
	configure_out_port(mosi, blk2, 0);
	configure_in_port(miso, blk2);
	clearbuf(mosi);
	clearbuf(sclk);

	start_clock(blk1);
	start_clock(blk2);

	mosi <: 0x55;
	sclk <: 0x15555&0xffff;
	sync(sclk);
	miso :> void;

while(1);
return 0;
}

[matrix]

Ok, my week was a little bit difficult..
Hopefully this is an working idea for SPI Mode-0 :lol:

Code: Select all

#include <platform.h>

out buffered port:8 sclk = XS1_PORT_1A ;
out buffered port:8 mosi = XS1_PORT_1B;
in buffered port:8 miso = XS1_PORT_1C;

clock blk1 = XS1_CLKBLK_1 ;
clock blk2 = XS1_CLKBLK_2 ;


int main()
{
        unsigned char data=0x55;
	configure_clock_rate(blk1, 100,8);
	configure_out_port(sclk, blk1, 0);
	configure_clock_src(blk2, sclk);

	configure_in_port(miso, blk2);
	clearbuf(mosi);
	clearbuf(sclk);
	start_clock(blk1);
	start_clock(blk2);

	if(data&0x80)configure_out_port(mosi, blk2, 1);
        else configure_out_port(mosi, blk2, 0);
	clearbuf(miso);
	
	mosi <: data;
	sclk <: 0x55;
	sclk <: 0x55;
        sync(sclk);
	miso :> void;

while(1);
return 0;

}