I2C Master 7-Bit Read/Write Register Address

[afoster1950]

Hi,

I'm digging through the IIC master module and have came across a puzzling define. The reg_addr is limited to 7 bits. Is there an architecture specific reason for why these modules cannot read/write anything above 0x7F? The IIC specification limits 7-bits for device addresses but it is not clear to me why the module enforces this on data registers as well.

Can anyone provide an explanation or possible history of the module?

Thanks,

Andrew

[segher]

I'm digging through the IIC master module and have came across a puzzling define. The reg_addr is limited to 7 bits. Is there an architecture specific reason for why these modules cannot read/write anything above 0x7F?

I don't see any #define like that, but the comments in the header file
seem to be incorrect (or out of date), indeed. If you look at the actual
code (in i2c-mm.xc) you see that the full 8 bits works fine, except for
when the TI workaround thing is enabled, but that is not valid code at
all (shifting a char by 8 bits? uh-oh).

The code should work fine for you as-is.