Hello,
I would like to use X0D07 pin as input during normal process(after boot). However XU208-256-TQ64 data sheet says "Pins X0D04, X0D05, X0D06, and X0D07 are output only..."(Page 72, H.7 GPIO). Does this mean X0D07 is reserved for QSPI SPIO? If so, why are X0D04-D07 output only and can't these pins be reused as input? I'm going to use "Boot from SPI master". In case of SPI master, is the usage of X0D07 input OK?
Thanks.
X0D07 pin on XU208-256-TQ64 Topic is solved
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Kasebe
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mon2
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https://www.xmos.com/download/private/X ... .10%29.pdf
This post is nice and on topic:
http://www.xcore.com/forum/viewtopic.ph ... hilit=qspi
This spreadsheet is also worth a quick read:
https://www.xmos.com/search/content?term=X07017
Use the following group for your project:
4B0..4B3 ; respectively must use all 4 bits as INPUT or all 4 bits as OUTPUT (ie. as a 4 bit group)
* (and still continue to use the same port pins for QSPI booting)
This post is nice and on topic:
http://www.xcore.com/forum/viewtopic.ph ... hilit=qspi
This spreadsheet is also worth a quick read:
https://www.xmos.com/search/content?term=X07017
Use the following group for your project:
4B0..4B3 ; respectively must use all 4 bits as INPUT or all 4 bits as OUTPUT (ie. as a 4 bit group)
* (and still continue to use the same port pins for QSPI booting)
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henk
- Respected Member
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- Joined: Wed Jan 27, 2016 5:21 pm
Hello Kasebe,
In addition to the useful links that mon2 provides; even if you use SPI master as your boot mode, the device will use all of X0D04..X0D07 to determine its boot mode.
Hence, if you want to use any of those as inputs; then you will have to make sure they are in the correct state when the system comes up (I think it is X0D05..7 low, X0D04 high for QSPI master). You may be able to achieve that with an external gate in X0D07, that guarantees that X0D07 stays low until boot has completed. Same for the other three pins.
Best wishes,
Henk
In addition to the useful links that mon2 provides; even if you use SPI master as your boot mode, the device will use all of X0D04..X0D07 to determine its boot mode.
Hence, if you want to use any of those as inputs; then you will have to make sure they are in the correct state when the system comes up (I think it is X0D05..7 low, X0D04 high for QSPI master). You may be able to achieve that with an external gate in X0D07, that guarantees that X0D07 stays low until boot has completed. Same for the other three pins.
Best wishes,
Henk
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Kasebe
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Hello mom2, henk,
Thank you for your quick information.
Port map says X0D07 can be input/output, on the other hand, schematics check list says "Pins X0D04, X0D05, X0D06, and X0D07 are output...". I was confused these different descriptions.
I could understand "Pins .. output.." is the state during boot detection and booting.
To henk,
I have a question about your explain. You said "X0D04..X0D07 to determine its boot mode.", but the data sheet looks like to say X0D04-X0D6 decide boot mode, X0D07 isn't used. The x0D07 is actually used for boot mode selection. Is my understanding correct?
Thank you for your quick information.
Port map says X0D07 can be input/output, on the other hand, schematics check list says "Pins X0D04, X0D05, X0D06, and X0D07 are output...". I was confused these different descriptions.
I could understand "Pins .. output.." is the state during boot detection and booting.
To henk,
I have a question about your explain. You said "X0D04..X0D07 to determine its boot mode.", but the data sheet looks like to say X0D04-X0D6 decide boot mode, X0D07 isn't used. The x0D07 is actually used for boot mode selection. Is my understanding correct?
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henk
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Hello Kasebe,
The data sheet both says 'Boot mode is determined by X0D04..6' and 'X0D04..7 should not be used for input'.
To comply with the data sheet, you must not use X0D07 as input.
Having said that, the boot-rom appears to ignore X0D07. If this is confirmed, then we will change the data sheet to remove the restriction on X0D07.
For your design, I suggest you either first perform an experiment to satisfy yourself that it works, or add one external gate to the design.
Thanks for raising this,
Henk
The data sheet both says 'Boot mode is determined by X0D04..6' and 'X0D04..7 should not be used for input'.
To comply with the data sheet, you must not use X0D07 as input.
Having said that, the boot-rom appears to ignore X0D07. If this is confirmed, then we will change the data sheet to remove the restriction on X0D07.
For your design, I suggest you either first perform an experiment to satisfy yourself that it works, or add one external gate to the design.
Thanks for raising this,
Henk