Status: Public release
XMOS BIT Scheme is a Scheme interpreter for XMOS chips. It is byte code based, in order to reduce memory size to fit inside the available 64KB of memory. The interpreter exploits the multi-threaded nature of this architecture by running multiple interpreters in parallel, concretely one interpreter on each core. In addition, each interpreter contains abstractions to manage this concurrency and to exploit features speciﬁc of the XMOS hardware. Such abstractions include sending messages between interpreters over channels, performing IO, using timers. Concretely, XMOS BIT Scheme enables an event-driven style for programming multi-core embedded systems in Scheme. More information can be found on http://xmos-vub.blogspot.com .