Migrating from XHRA to XU208

Discussions about USB Audio on XMOS devices
just280
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Post by just280 »

I've seen that post.

Reason 1. - How do I know the JTAG has been disabled in the OTP security register? This is a new blank device i'm trying to flash.
Reason 2. - Checked that out - reset controlled by an external microcontroller but otherwise tied to 3v3.
Reason 3. - Clock is fine and same as working XHRA circuit I have. I can't find any mention of mode pins on the XU208 datasheet? Wasn't the XU208 a drop-in replacement?
Reason 4. - VDD Core same as working XHRA circuit.
Reason 5. - VDD PLL same as working XHRA circuit.
Reason 6. - Power supplies same as working XHRA circuit.
Reason 7. - Ground paddle soldered well.
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mon2
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Post by mon2 »

http://www.xcore.com/viewtopic.php?t=3713

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http://www.xcore.com/viewtopic.php?t=3713
1) Pin 1 (aka X0D01) requires a pull-up to +3v3.

2) Closely inspect the quality of your soldering of the XMOS device.

3) The RST pin is often driven by open drain devices so for that reason, an external pull-up to +3v3 is recommended on the XMOS CPU.

4) Is the mated external flash already enabled for QSPI mode? That is required. If not, you will have to boot in NORMAL SPI mode -> enable the QSPI bit so that you can use QSPI mode -> then alter the boot mode after this change to be QSPI BOOT mode.

I think I posted some code to do this somewhere on these forums. If not, can post again on how to enable the QSPI bit using the StartKit but the idea is the same for other XMOS processors.

Summary is that using standard SPI mode or basic bit-banging out the SPI spec commands, you can R/W to ANY SPI flash device. Then use this slower method of access to enable the QSPI bit for your flash device. After this bit is enabled, you will have to change the boot mode to be QSPI.

This may be the root cause. Using the XSYS connector -> can you run simple LED blinky code on your custom PCB? The only issue is that you cannot flash your firmware?

5) Aside from the above, recommend to post a more complete schematic for another review.
just280
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Post by just280 »

Hi,

Full schematic attached.
X0D01 (pin 11) is tied to 3v3.
The RST pin is tied to 3v3 on another schematic.
Yes the QSPI is pre-programmed and quad enabled.

My main concern at the moment is my JTAG connections and if they are correct for flashing the device?
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mon2
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Post by mon2 »

JTAG reset from pin #3 of the IDC pinout is missing and is required.

This is the reset line asserted by the JTAG master to initiate the JTAG state machine.

Please check the xtag2 or xtag3 manuals for full pinout details. For an explanation on how JTAG works, review the great article on fpga4fun website. We learned from there to write our own JTAG state machine on xmos to reflash a Lattice fpga.

Please add this missing pin and can review this connection from the xcore-200 explorer kit or similar. Please post your status after this review.

Update - Also suggest to add the RST_N from pin 15 of xsys interface for cpu debug support.
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mon2
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Post by mon2 »

Wish to expand the jtag reset details..the jtag state machine can also reset the cpu by placing tms high for 5 clock cycles but do review the use of the xsys tool supplied reset pins as used on xcore-200 explorer kit or similar.

In addition to the above, review that idc box header pin 1 is mating with pin 1 of the xsys tool and not with pin 2. Good way to confirm is to check where the grounds on the xsys tool end up on your pcb. The alternating idc header pinout is easy to confuse.
just280
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Post by just280 »

I admit I forgot to mention that pin #3 JTAG reset was not connected but I have already made that connection and still no luck flashing the device. I will check out your other suggestions, cheers!
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mon2
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Post by mon2 »

XCORE-200 explorer kit is using pin #15 of xsys idc connector. Please do the same to see if this helps.
just280
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Post by just280 »

Yes that's exactly how I have it connected now pin #15 JTAG to pin #57 RST_N on XU208 but still no joy?
By the way I do not have any of the XL_UP or XL_DN pins connected which I assume do not need to be connected for a simple device flash.
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mon2
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Post by mon2 »

No, the other lines on xsys should not impact the flashing process. IDC pin mapping ok? Very important that pin 1 is correct else all pins will not interface correctly.

Can you post the power supply and reset sequence circuits from your design? Believe that portion was not included in your last schematic post.
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