XC-1A clocked output

[cicga]

hi all
I am working on clocked outputs and have some problem. here is code:

Code: Select all

#include <platform.h>
on stdcore[2]:  out port outClock = XS1_PORT_1A ;
on stdcore[2]:  out port     outP = XS1_PORT_1B ;
on stdcore[2]:          clock clk = XS1_CLKBLK_1 ;

 void config()
 {
	configure_clock_rate (clk , 100 , 8);
	configure_out_port (outP , clk , 0);
	configure_port_clock_output ( outClock , clk );
       start_clock (clk );
 }

 void gen()
 {
timer tmr;
unsigned time;

	config();
	while(1)
	{
		for( int x=0;x<16;x++)
		   outP <:(43365 &(1<< x))/(1<< x);
        tmr:>time;time+=100;
        tmr when timerafter (time):>void;
	}
 }

int main ( void )
{

    par{
          on stdcore[2]: gen();
      }
      return 0;
}

it simple ,I expect to see on LA clock signal on 1A port and data on 1B port, but instead I have garbage.
pls see image. somebody has an idea why this happen?

[Ali]

Hi Cicga

The code you have is correct, it runs correctly for me on the simulator.
Have you been able to get it to work?

Ali