Most other RTOS have mutex/semaphores and mailboxes for passing data. Usually you would just pass a pointer into the mailbox rather than the entire large byte array.
I ran into this kind of problem with xmos software defined peripherals. If I have a communication thread then it's difficult to pass large amounts of data quickly enough to make use of the real time features.
I can understand Xc was designed so you could chain multiple cores together and then it makes sense but on a single shared memory core you should have access to data without double copies.
One thing that would be a big improvement is a deeper FIFO on some ports. Right now it only has the single shadow register.
Typically processors have deep FIFO for things like usb, ethernet, spi, timers, etc.
I have found it's extremely difficult to do high speed input on a xmos device due to the lack of fifo relying only on the single shadow register (eg spi slave). High speed output is ok (eg spi master).
How to use the same memory in multi threads?
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