I have a question for I2S operation.
[I2S Input]
BCLK
LRCLK
SDATA
x4
[I2S Output]
BCLK
LRCLK
SDATA0
SDATA1
SDATA2
SDATA3
x1
Generally, I think 1ch I2S has 3 line.
Can X-core operate 4 data output with common BCLK and LRCLK?
Thank you.
Does the xcore support multiple I2S datelines with common bc Topic is solved
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Kasebe
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Ross
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"Generally, I think 1ch I2S has 3 line."
No, 2 channels i.e. stereo.
Can X-core operate 4 data output with common BCLK and LRCLK?
Yes it can. The current I2S component assumes on BCLK and LRCLK for multiple ADC/DAC datalines.
You can of course program the xcore do what ever you like!
No, 2 channels i.e. stereo.
Can X-core operate 4 data output with common BCLK and LRCLK?
Yes it can. The current I2S component assumes on BCLK and LRCLK for multiple ADC/DAC datalines.
You can of course program the xcore do what ever you like!