Boot mode pins vs. SS_MODE pins

[ers35]

Address 0x03 of 9.1 Processor status registers of The XS1-L system spec says "Value of the boot mode pins"

Address 0x00 of 9.3 Interconnect registers of The XS1-L system spec contains "bits 23..16: The value of the SS_MODE pins, sampled on reset"

What is SS_MODE? What do the bits mean? Is there any relationship between the boot mode pins and SS_MODE?

The xlreg script uses SS_MODE, but calls it BootMode: https://github.com/xcore/xgdb_scripts/b ... /xlreg#L40