XRunner - JTAG Programmer for Altera FPGAs

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Version: 0.1
Status: Under development
License: BSD

Introduction

This project is a modified port of the JRunner JTAG programmer code released by Altera. The original JRunner ran on Windows and used the parallel port to program FPGAs through a bit-banged JTAG protocol. JRunner required a .cdf file (Chain Description File) that held information regarding the target JTAG chain and also referenced one or more .rbf files (Raw Binary File) that were then used to program each FPGA chip.
In situations where there is both a FPGA and XMOS chip involved on the same board, XRunner will enable the XMOS chip to directly program the FPGA. The current configuration will allow the XMOS to read the FPGA image from excess space on the serial flash chip and configure the FPGA with it. This will only require 4 pins on the XMOS for TCK, TMS, TDI, and TDO and no additional pins on the FPGA since the JTAG pins are already dedicated.
Approach

Since the JRunner code contains many constant tables with information on all the devices manufactured by Altera, a direct port of JRunner will require an excessive and unnecessary amount of precious program memory to represent those configuration values. Instead, XRunner will actually comprise of two different code-bases. XMerge will be a C/C++ program that runs on the PC, while XRunner will be a C/XC program that runs on the XMOS.
XMerge will take in a .cdf file and several .rbf files and merge the information into a comprehensive .xdb (XRunner Description Binary) that contains information on the JTAG chain, specific information about each chip in the chain, and the FPGA image. The contents of the .xdb can then be written to a portion of the serial flash chip connected to the XMOS chip.
XRunner will read the serial flash chip at the address where the .xdb file starts. It will first verify that the physical target JTAG chain matches the chain described in the .xdb file. If verification succeeds, then XRunner will proceed to program each FPGA chip with the binary data stored.
Advantages

* Boot both the XMOS and FPGA from a single serial flash chip

* Save precious PCB real-estate with fewer components

* Re-load the FPGA image in real-time

* Allow the FPGA to dedicate more pins to general IO