Greetings from Croatia
Posted: Thu Dec 28, 2017 10:31 am
Hello everyone, this is actually my second post, I want to send my regards to the community and XMOS team. I spent some time now trying within my knowledge limits to see is it possible to use xCORE as a new "central/master" MCU for our open source test & measurements experiments. Currently we are using Arduino Due (32-bit ARM) and pushing it to the limits working with USB, Ethernet, touch-screen display management, SCPI parser, and many SPI peripherals.
It seems that xCORE offer so much when hi-speed data transfers and manipulation is required, making it promising candidate for e.g. hi-speed data acquisition and signal generation without going into the FPGA domain. However, one thing rise my concerns about its possibility to be used as master and not "co-processor": that is limited total working memory size (256KB per tile). That could be more then enough as SRAM for program data, but when I found that firmware have to be loaded into it, that was (almost) shocking revelation.
That issue possibly belong to category "it's a feature, not a bug", or I missed the point (or target type of xCORE applications) but I read thru e.g. this thread and find out that many other people shared my concern, and that so far nothing is changed nor announced (don't know how to interpret this "roadmap" info). Anyway, I'd like to give it a try, making my own "evaluation board" following pin mappings and functionality of existing (currently not available at Farnell :) evaluation boards. Target MCU is XE216-512-TQ128-C20 (also currently not available) since it include Ethernet and USB and comes in "DIY-friendly" package (BGAs are beyond my assembling capability).
I'd like to know if anyone has first-hand experience with so-called SRAM Software Controller? Which chip manufacturers and technology it supports? What type of functionality it address? I presume that for e.g. frame-buffering I should use SDRAM library.
Thanks in advance,
Denis
It seems that xCORE offer so much when hi-speed data transfers and manipulation is required, making it promising candidate for e.g. hi-speed data acquisition and signal generation without going into the FPGA domain. However, one thing rise my concerns about its possibility to be used as master and not "co-processor": that is limited total working memory size (256KB per tile). That could be more then enough as SRAM for program data, but when I found that firmware have to be loaded into it, that was (almost) shocking revelation.
That issue possibly belong to category "it's a feature, not a bug", or I missed the point (or target type of xCORE applications) but I read thru e.g. this thread and find out that many other people shared my concern, and that so far nothing is changed nor announced (don't know how to interpret this "roadmap" info). Anyway, I'd like to give it a try, making my own "evaluation board" following pin mappings and functionality of existing (currently not available at Farnell :) evaluation boards. Target MCU is XE216-512-TQ128-C20 (also currently not available) since it include Ethernet and USB and comes in "DIY-friendly" package (BGAs are beyond my assembling capability).
I'd like to know if anyone has first-hand experience with so-called SRAM Software Controller? Which chip manufacturers and technology it supports? What type of functionality it address? I presume that for e.g. frame-buffering I should use SDRAM library.
Thanks in advance,
Denis