Custom Board XLINKS

[rp181]

I have a custom board that is modular. Right now, 2 are connected (each have a L1), and I am trying to see if the XLINKs work. The boards work fine individually (runs code), but when I try to run a multi-core program even if no code is launched on more than 1 core), I get an exception. Is this a software or a hardware issue?

Exception:

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xrun: Program received signal ET_ILLEGAL_RESOURCE, Resource not valid.
      0x0001044c in wakeCore ()

Code:

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/*
 ============================================================================
 Name        : xk1-concurrent.xc
 Description : Testing XLinks
 ============================================================================
 */

#include <platform.h>
#include <stdio.h>

void input(chanend o);
void output(chanend i);

int main(void) {
	chan c;
	par {
		on stdcore[0] :
		input(c);
		on stdcore[0] :
		output(c);

	}
	return 0;
}
void input(chanend o) {
	printf("Test Begin\n");
	while (1) {
o		<: ((unsigned) 15);
	}
}
void output(chanend i) {
	unsigned t;
	while (1) {
i		:> t;
		printf("Read %i\n",t);
	}
}

XN File:


From what I can see, I think this is a problem with establishing a connection. Is this right?

EDIT: These boards (but only 2): https://xcore.com/forum/viewtopic.php?f=8&t=1465

[lilltroll]

Have you read the old post on the forum about someone that chained a long series with L1s.

I think it was something about the xn file.

[Bianco]

Before anything else try to decrease the link speed first.
I'm not sure whether the XN files have options for the switch frequency or whether the mapper will limit it to 400MHz. If the switch runs on 500MHz too, the links are running out of spec.

[rp181]

Where would one decrease the speed?

[Bianco]

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<Link Encoding="2wire" Delays="0,0">
                        <LinkEndpoint NodeId="N0" Link="X0LD" />
                        <LinkEndpoint NodeId="N1" Link="X0LB" />
                </Link>

the Delays=

One of them is the symbol delay and the other is the inter-token delay. They are usually the same number.
You could try

<Link Encoding="2wire" Delays="2047,2047">

Which is the maximum delay and is about 200k transitions per second.

[rp181]

I tried it with the delay, and same problem.

[Bianco]

Some schematics would be handy to rule out wrong xlink connections.
Both boards are set to JTAG boot? And xrun -l shows both nodes?

[rp181]

Here is a schematic.
The Mezzanine BOTTOM connects to the TOP connector on the board below it. The JTAG/XLINK pins are on the upper left.

I verified it with the XK-1A, the only difference is that I moved it to link B so I can boot from it, XK-1A uses C and D.
The connections:
B1out-D1in
B0out-D0in
B0in-D0out
B1in-D1out

The TRST_N is buffered for each one, so they are all booting JTAG.

EDIT: xrun does indeed show both nodes:

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Available XMOS Devices
----------------------

  ID    Name                    Adapter ID      Devices
  --    ----                    ----------      -------
  0     XMOS XTAG-2             VN4T4S5o        L1[0..1]

[rp181]

So I went through the XN File again, and can't find any errors (almost exactly the same as the example XN file). In addition, the simulator runs it just fine. Does this mean it is a HW issue?

[Bianco]

Do you have the ability to probe the links?
If i recall correctly, you have a Saleae LA. It can easily capture an xmos link at lower speeds.
I wrote a plugin to decode the tokens that i'm willing to share with you (It's also scheduled for public release).