Clock divider

[DaveBest]

Greetings.

I am trying to implement a spi master on my XC2 board but am running into some oddities.

I am using the latest sc_spi to adapt my spi implementation, while configuring the spi interface with

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configure_clock_rate(i.blk1, 100, spi_clock_div);

i seem to be running into an old problem which i never could figure out.
The comments point out how to use the divider:

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// SPI clock frequency is fref/(2*spi_clock_div)
// where freq defaults to 100MHz

But while testing out some frequencies it seems i can only use an even divider.
Odd divider numbers prompt errors when launching.

xrun: Program received signal ET_ECALL, Application exception raised.
[Switching to Node 0 XCore 0 Thread 3]

I read that the resulting freq is refclock(100) / 2*divider with 0 as divider for 100 MHz, and that it really is 50/divider for the resulting clock.

Is there a specific reason for even-only dividers and i am seriously missing something? Or is it better to use *_at_least / *_at_most to for specific frequencies?


I seem to have gotten quite rusty in this
Thanks in advance

Dave

[segher]

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configure_clock_rate(i.blk1, 100, spi_clock_div);

That configures the clock to 100/spi_clock_div MHz exactly, and raises
an error if it cannot do that.

The comments point out how to use the divider:

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// SPI clock frequency is fref/(2*spi_clock_div)
// where freq defaults to 100MHz

The configured frequency on the clock block is Fref/(2*divider), but
divider is not spi_clock_div, instead it is some value derived from it
by configure_clock_rate(); nothing in the standard library lets you set
the divider directly.

[DaveBest]

Thanks for the anwser.

That configures the clock to 100/spi_clock_div MHz exactly, and raises
an error if it cannot do that

Okay, thats what i thought , but if i set it to an non-even number like (3,5,7,9,11,...) my app crashes.
Perhaps i should add that my board is also running the tcpip stack.

Again sorry for using divider, i meant divisor or in this case spi_clock_div.

Dave

[segher]

That configures the clock to 100/spi_clock_div MHz exactly, and raises
an error if it cannot do that

Okay, thats what i thought , but if i set it to an non-even number like (3,5,7,9,11,...) my app crashes.

Your reference clock is 100MHz (it usually is). If you configure the clock
with a divider of 0, the clock will be 100MHz; if you configure the clock
with a divider of N>0, the clock will be 100/(2*N) MHz = 50/N MHz.

configure_clock_rate() does _not_ take the raw divider value as argument,
instead you give it the actual target frequency you want, so in

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configure_clock_rate(i.blk1, 100, spi_clock_div);

the valid values of spi_clock_div are 1, 2, 4, 6, ..., 510.

The comment in the code seems to confuse things, agreed.