The official XS1-SU1 discussion thread

Technical discussions around xCORE processors (e.g. xcore-200 & xcore.ai).
User avatar
phalt
Respected Member
Posts: 298
Joined: Thu May 12, 2011 11:14 am
Contact:

The official XS1-SU1 discussion thread

Post by phalt »

A new chip!

If you have any questions or want to discuss it, do so here!

We'd love to hear any plans or projects people think the XS1-S would be good for.


User avatar
phalt
Respected Member
Posts: 298
Joined: Thu May 12, 2011 11:14 am
Contact:

Post by phalt »

Awesome to see some new projects for the board already!
User avatar
Bianco
XCore Expert
Posts: 754
Joined: Thu Dec 10, 2009 6:56 pm
Contact:

Post by Bianco »

I have confirmation that the SU1 is link compatible with L.
A good thing :)
User avatar
leon_heller
XCore Expert
Posts: 546
Joined: Thu Dec 10, 2009 10:41 pm
Location: St. Leonards-on-Sea, E. Sussex, UK.
Contact:

Post by leon_heller »

When will it be available from RS and D-K?
User avatar
phalt
Respected Member
Posts: 298
Joined: Thu May 12, 2011 11:14 am
Contact:

Post by phalt »

leon_heller wrote:When will it be available from RS and D-K?
Currently we're looking at 6-8 weeks.
User avatar
phalt
Respected Member
Posts: 298
Joined: Thu May 12, 2011 11:14 am
Contact:

Post by phalt »

Bianco wrote:I have confirmation that the SU1 is link compatible with L.
A good thing :)
Awesome!
User avatar
phalt
Respected Member
Posts: 298
Joined: Thu May 12, 2011 11:14 am
Contact:

Post by phalt »

Answers to some user questions

I've had a few private messages with questions. I thought I'd post the answers here so everyone can benefit from them.
Is there an example design like with the other chips?
An example design will be available soon, see https://www.xmos.com/products/developme ... sbaudio2su
Are there any footprint / landing patterns available?
The datasheet includes the package details. A footprint will be released soon with an example board design.
Other datasheet and XMOS documentation for the chip?
The datasheet is available here: https://www.xmos.com/published/xs1-su01 ... ion=latest
Can we get use of all the I/O pins exposed on the package whilst using USB?
Yes! All the I/Os on the SU1 device are available whilst using the USB interface.
User avatar
ahenshaw
Experienced Member
Posts: 96
Joined: Mon Mar 22, 2010 8:55 pm

Post by ahenshaw »

The datasheet shows 500 MIPS, but the announcement mentions 700 MIPS. Is the higher-speed part available? Will the older 4-core chips also migrate to 700 MHz, soon?
User avatar
Bianco
XCore Expert
Posts: 754
Joined: Thu Dec 10, 2009 6:56 pm
Contact:

Post by Bianco »

ahenshaw wrote:The datasheet shows 500 MIPS, but the announcement mentions 700 MIPS. Is the higher-speed part available? Will the older 4-core chips also migrate to 700 MHz, soon?
The higher speed part information will be disclosed (at some time).
None of the devices are direct available (see above)

And no the 4-core devices will not see a migration to 700MHz, they are first-gen while this is the third gen family.
User avatar
lilltroll
XCore Expert
Posts: 956
Joined: Fri Dec 11, 2009 3:53 am
Location: Sweden, Eskilstuna

Post by lilltroll »

I was really expecting that. Everything was so quiet for an moment, and the time has gone by since you had the job offer for the new chip out in the paper.
Great job !
Probably not the most confused programmer anymore on the XCORE forum.
Post Reply