XCore Exchange

I assumed the SD card interface in the xmoslinkers.org link was SPI mode but it appears after further research it is actually 1-bit SD mode (which is obviously different).

However, I really hoped to save some IO lines because I am out of available IO lines and use the SPI flash lines (PORT1A, B, C, D).

After the boot up process is finished, can I just disable the CS on the spi flash chip by raising it and use the CLK, MISO and MOSI as general IO?

If I hook up the SD card in 1 bit mode to these lines, will I have problems?

I know if I have multiple SPI parts, I can reuse clk, miso, mosi and just need 1 i/o line for each CS.

I do not know too much about the 1-bit SD card mode and if this would be a safe practice but I assume if the SD card can operate in both SPI mode and SD card mode then it probably will work.

Anyone have any insight?

kster59 wrote: After the boot up process is finished, can I just disable the CS on the spi flash chip by raising it and use the CLK, MISO and MOSI as general IO?

If I hook up the SD card in 1 bit mode to these lines, will I have problems?

I know if I have multiple SPI parts, I can reuse clk, miso, mosi and just need 1 i/o line for each CS.

Yes... this is all fine - as long as you disable the flash chip with the CS you can do what you want with the other lines. If you only want two devices on the bus then you could just use some inversion on the CS line and save having another CS IO (i.e. when CS = 0 it selects device A, when CS = 1 it selects the boot flash).

It's not uncommon in applications to reuse these ports for wildly different purposes - obviously check that it's not going to do anything by sending spurious signals!

I guess the question is that the SD card starts up in 1 bit SD card mode.

In SPI, the chip isn't supposed to do anything if it's CS is high.

But 1-bit SD card mode only requires 3 data lines, all 3 of which are shared.

If I boot off the bootflash, couldn't the sd card initialize and start writing garbage to the sd card in 1bit sd card mode? Furthermore, could it start asserting the DO line?

If it were a regular SPI peripheral, if the CS line is high then all the data is ignored.

Thus is it safe to share the SPI boot peripheral lines with the SD card?

I guess I could use an AND gate with input 1=spi_clk, input 2=spi_flash_cs, output = spi_clk_to_sd card. This would only activiate the clk to the sd card if the CS line = high -> spi flash is not used.

Maybe this is safest solution. Any problems with this?

Re-use is definitely possible. i have an RTC connected on the same lines successfully. However, I did spend a fair bit of time working out how to share the lines, because I actively use the flash library in my application for in system upgrades. For one the flash library uses an 8 bit buffered port on the MISO and MOSI lines. Anyway I found the flash library lacking, and yet still wanted to take advantage of the image routines. If anyone at XMOS is listening, PLEASE provide the source for the flash library. Also please provide raw accessor routines to read and write the SPI bus. In reality source code would be enough.

regards Mike

I second the opening of the source code for the flash library on github, it would be useful to many folks IMHO.

regards
Al