1 bit port write on tile 1 disables LRCLK

Technical questions regarding the xTIMEcomposer, xSOFTip Explorer and Programming with XMOS.
Biquad
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Posts: 11
Joined: Wed May 24, 2017 11:38 am

1 bit port write on tile 1 disables LRCLK

Postby Biquad » Tue May 04, 2021 9:54 am

Hello, i have checked everything but i can't find the problem so maybe someone can help.
If i write a high to an 1 bit port on tile 1 the lrclk X0D22 stops working. It seems that this 1 bit ports are used somewhere but the compiler gives no hints.
The only one connected to tile 1 is mclk on X1D35
I use app_usb_aud_xk_216_mc XEF216

/* Tile defines */
#define XCORE_200_MC_AUDIO_HW_VERSION 2
#define AUDIO_IO_TILE (0)
#define XUD_TILE (1)
#define AUDIO_CLASS_FALLBACK (0)

/* option defines */
//#define UAC_FORCE_FEEDBACK_EP
#define MIXER (1)
#define MAX_MIX_COUNT (0)
#define SELF_POWERED (1)
#define MIDI (0)
#define HID_CONTROLS (0)
#define SPDIF_TX (0)
#define SPDIF_RX (0)
#define NUM_USB_CHAN_IN (2) /* 2 in 2 out -> stereo in stereo out */
#define NUM_USB_CHAN_OUT (2)
#define I2S_CHANS_DAC (0)
#define I2S_CHANS_ADC (2)
#define MAX_FREQ (216000)
#define NATIVE_DSD_FORMAT_NUM (0)


#include <xs1.h>
#include <assert.h>
#include "devicedefines.h"
#include <platform.h>
#include "gpio_access.h"
#include "print.h"
#undef USE_FRACTIONAL_N

on tile[0] : out port p_gpio = XS1_PORT_8C;
on tile[1] :out port srate_0 = XS1_PORT_1C; // X1D10 on Tile 1
on tile[1] :out port srate_1 = XS1_PORT_1D; // X1D11

set_gpio(P_GPIO_ADC_RST_N, 0);

srate_0 <:1; // -> LRCLK DEAD

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