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#include <platform.h>
out port p1L = XS1_PORT_1L;
out port p1M = XS1_PORT_1M;
out port p4A = XS1_PORT_4A;
clock clk = XS1_CLKBLK_1;
int main(void) {
int i = 0;
configure_clock_rate(clk , 100 , 10);
configure_out_port(p4A, clk , 0);
configure_port_clock_output(p1L , clk);
configure_port_clock_output(p1M , clk);
start_clock(clk);
while (1) p4A <: i++;
return 1;
}
1- No clock signal on 1M 2- Going beyond 12.5Mhz, say 16.7Mhz (100/6), the data output timing is not correct anymore. Surely, running at a frequency of 400Mhz, we should be able to output port data at 50Mhz!?
Are these limits of the simulator or physical limits not quite clearly documented?
Thanks for your help,