XTC tools beginner TDM 8 chan SLAVE -> USB IO Topic is solved

[benbiles]

I am just learning my way around XTC tools using sw_usb_audio-_sw_v8_1_0

I am using x200 series chip , XE216-512-TQ128 on my own pcb using 24mhz clock

I am building a USB audio & TDM SALVE 8in 8out audio interface that hooks up to a DSP chip.

following the sw_usb_audio_-sw_usb_audio-_user-guide_v8_1_0 guide I edited the make file in the app_usb_aud_xk_216_mc project to build this...

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# Audio Class 2, Async, I2S Slave, 8xInput 8xOutput (TDM)
# Note, TDM requires more MIPs than I2S so we do volume processin in the decouple task
INCLUDE_ONLY_IN_2ASi16o16xxxxxx_tdm8 =
XCC_FLAGS_2ASi16o16xxxxxx_tdm8 = $(BUILD_FLAGS) -DI2S_CHANS_ADC=8 \
                                                -DI2S_CHANS_DAC=8 \
                                                -DNUM_USB_CHAN_IN=8 \
                                                -DNUM_USB_CHAN_OUT=8 \
                                                -DXUA_PCM_FORMAT=XUA_PCM_FORMAT_TDM \
                                                -DMAX_FREQ=96000 \
                                                -DCODEC_MASTER=1 \
                                                -DOUT_VOLUME_IN_MIXER=0

my understanding is that CODEC_MASTER = 1 should be TDM slave mode.

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xmake clean
xmake all 

it builds without errors.

I supply MCLK pin with 12.288mhz so I change multiplier from 512 to 256 in xua_conf.h

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/*** Defines relating to audio frequencies ***/
/* Master clock defines (in Hz) */
#ifndef MCLK_441
#define MCLK_441           (245*44100)   /* 44.1, 88.2 etc */
#endif

#ifndef MCLK_48
#define MCLK_48            (256*48000)   /* 48, 96 etc */
#endif

after I flash to xmos x200 chip the USB enumerates on the PC with 8 in 8 out ports in ASIO using the TUSB evaluation driver
but no audio comes through the TDM slots to PC

The TDM LRCLK is 1 bit high at start and end of TMD 8 slot frame 256 bclk wide. 8 x 32bit slots.

I wonder if the application needs some kind of clock other than mclk input in slave mode ?
or maybe I should have some other type of LRCLK ? the 24bit samples are in the left of the 32bit frame.
quite standard for TDM ?
I also tried a 50% duty cycle I2S style LRCLK with no luck.

TDM pins are configured in xk-audio-216-mc.xn as follows

I uncomment unwanted unused pins apart from qspi flash & I2C.
Although I don`t need the I2C the application complains about lack of defines without.

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     <Tile Number="0" Reference="tile[0]">
       <Port Location="XS1_PORT_1B" Name="PORT_SQI_CS"/>
       <Port Location="XS1_PORT_1C" Name="PORT_SQI_SCLK"/>
       <Port Location="XS1_PORT_4B" Name="PORT_SQI_SIO"/>
   
       <!-- Audio Ports -->         
    <!--   <Port Location="XS1_PORT_1A"  Name="PORT_PLL_REF"/> -->
     
	<Port Location="XS1_PORT_1F"  Name="PORT_MCLK_IN"/>   <!-- mclk 12.288mhz X0D13  -->
	  
	  
       <Port Location="XS1_PORT_1G"  Name="PORT_I2S_LRCLK"/>  <!-- LRCLK TDM 1bit high start&end X0D22 -->
       <Port Location="XS1_PORT_1H"  Name="PORT_I2S_BCLK"/>   <!-- BCLK TDM                      XD023 -->
      
	  
	<Port Location="XS1_PORT_1I"  Name="PORT_I2S_DAC0"/>   <!-- XMOS output to DSP X0D24-->
       
	  
 <!--   <port Location="XS1_PORT_1N"  Name="PORT_I2S_DAC1"/>  -->
    <!--   <port Location="XS1_PORT_1O"  Name="PORT_I2S_DAC2"/>  -->
    <!--   <port Location="XS1_PORT_1P"  Name="PORT_I2S_DAC3"/>  -->
	  
       
	  
	<Port Location="XS1_PORT_1M"  Name="PORT_I2S_ADC0"/>  <!-- DSP output to XMOS X0D36 -->


   <!--    <Port Location="XS1_PORT_1J"  Name="PORT_I2S_ADC1"/>     -->
   <!--   <Port Location="XS1_PORT_1K"  Name="PORT_I2S_ADC2"/>      -->
   <!--    <Port Location="XS1_PORT_1L"  Name="PORT_I2S_ADC3"/>     -->

       <Port Location="XS1_PORT_4A"  Name="PORT_I2C"/>        

   <!--     <Port Location="XS1_PORT_1M"  Name="PORT_DSD_DAC0"/>    -->
   <!--     <port Location="XS1_PORT_1N"  Name="PORT_DSD_DAC1"/>    -->
   <!--     <Port Location="XS1_PORT_1G"  Name="PORT_DSD_CLK"/>     -->
   <!--     <Port Location="XS1_PORT_1E"  Name="PORT_ADAT_OUT"/>    -->  <!-- D: COAX E: OPT -->
   <!--      <Port Location="XS1_PORT_1D"  Name="PORT_SPDIF_OUT"/>  --> <!-- D: COAX E: OPT --> 
     </Tile>
     <Tile Number="1" Reference="tile[1]">
       <Port Location="XS1_PORT_1H"  Name="PORT_USB_TX_READYIN"/>
       <Port Location="XS1_PORT_1J"  Name="PORT_USB_CLK"/>
       <Port Location="XS1_PORT_1K"  Name="PORT_USB_TX_READYOUT"/>
       <Port Location="XS1_PORT_1I"  Name="PORT_USB_RX_READY"/>
       <Port Location="XS1_PORT_1E"  Name="PORT_USB_FLAG0"/>
       <Port Location="XS1_PORT_1F"  Name="PORT_USB_FLAG1"/>
       <Port Location="XS1_PORT_1G"  Name="PORT_USB_FLAG2"/>
       <Port Location="XS1_PORT_8A"  Name="PORT_USB_TXD"/>
       <Port Location="XS1_PORT_8B"  Name="PORT_USB_RXD"/>

       <!-- Ports for USB feedback calculation --> 
       <Port Location="XS1_PORT_16B" Name="PORT_MCLK_COUNT"/>              
       <Port Location="XS1_PORT_1L"  Name="PORT_MCLK_IN_USB"/>
       <!-- Audio Ports -->
<!--     <Port Location="XS1_PORT_1M"  Name="PORT_MIDI_IN"/>   -->
<!--     <Port Location="XS1_PORT_1N"  Name="PORT_MIDI_OUT"/>  -->
<!--     <Port Location="XS1_PORT_1O"  Name="PORT_ADAT_IN"/>   -->  <!-- P: COAX O: OPT -->
<!--     <Port Location="XS1_PORT_1P"  Name="PORT_SPDIF_IN"/>  -->  <!-- P: COAX O: OPT --> 
     </Tile>

I removed some audio hardware control I don`t kneed in the hardware extension file audiohardware.xc like this

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void AudioHwInit()
{


// no hardware to controll here

    return;
}



void AudioHwConfig(unsigned samFreq, unsigned mClk, unsigned dsdMode,
    unsigned sampRes_DAC, unsigned sampRes_ADC)
{

// no hardware to control here

}

any ideas would be much welcome , before I start hacking through the code to try and find a work around.

hoping I have overlooked the PLL code and can bypass it for TDM SLAVE ?

lastly , I discovered the USB initializes regardless of if the reset is pulled high , I suppose USB area of xmos chip is lower level than the tiles


should I be using one of these in the makefile?

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-DXUA_SYNCMODE=XUA_SYNCMODE_ASYNC
                           = XUA_SYNCMODE_ADAPT
                           =XUA_SYNCMODE_SYNC

Ben

[Ross]

Mod edit: ive added [ code] [ /code] blocks around your pasted snippets. It really helps the readability for people that are trying to help you.

[Ross]

Is this on a custom board? Or the XK-AUDIO-216-MC? By default the code is going to expect MCLK to be applied to two pins - one on each tile.

When debugging audio stuff, always start with the clocks ;)

(okay, maybe power is number on the list .. :P)

[benbiles]

Hi , Yes custom board
8 chan ADC
8 chan DAC
M7 cortex
ADAU DSP
X200 xmos

guessed it would be clock issue.

I have the same 12.288mhz MCLK going to X1D35 from a clock buffer which is on the other tile ( tile 1 ) where i think USB code
is running.

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<Port Location="XS1_PORT_1L"  Name="PORT_MCLK_IN_USB"/>

I confirmed 12.288mhz MCLK is present on this pin.

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<Port Location="XS1_PORT_16B" Name="PORT_MCLK_COUNT"/>

my custom board is wired up the same way as XK-AUDIO-216-MC-AB with AR8035 ethernet PHY so I will leave that 8bit bus defined.

I see your from Bristol , I`m from Stroud originally , small world ! I`m based in Japan at the moment so quite late here.

Thanks for the clue , I forgot all about that other MCLK. Do I need to tell the USB audio code its clock is 12.288mhz and not 24.576mhz ?

will report back if I get anywhere.

[benbiles]

I managed to trace the problem back to a DSP routing issue.
There was no serial data going into the XMOS chip !!

I bridged the XMOS SD input pin with a known working one and audio was confirmed on ASIO channels on the PC.

Great, looking forward to being able to add my own C code to this application example.

[Ross]

The XMOS UK office is in Bristol! Silicon gorge as we like to call it ;)

Glad you’re up and running :)