S/PDIF input possible with fixed PLL instead of CS2100 fractional clock multiplier?

Sub forums for various specialist XMOS applications. e.g. USB audio, motor control and robotics.
mst
Junior Member
Posts: 6
Joined: Wed Mar 13, 2019 9:51 pm

S/PDIF input possible with fixed PLL instead of CS2100 fractional clock multiplier?

Postby mst » Sat Apr 13, 2019 8:13 am

I’m experimenting with the xCORE-200 multichannel audio kit. The software defaults to using the CS2100 as per app_usb_aud_xk_216_mc/src/extensions/audiohw.xc:

Code: Select all

#if defined(SPDIF_RX) || defined(ADAT_RX)
#define USE_FRACTIONAL_N 1
#endif
I have commented out USE_FRACTIONAL_N to switch to the PLL-generated clock, and that seems to work fine for the purpose of transporting S/PDIF input to the USB host. At least, audio arrives cleanly as far as I can tell from checking a few seconds of recording.

Is the CS2100 fractional clock multiplier optional if I only need S/PDIF input? Can I just use a single, fixed PLL when using multiple S/PDIF inputs? If no, what is the difference between the two options?

Thanks much in advance
mst
Junior Member
Posts: 6
Joined: Wed Mar 13, 2019 9:51 pm

Postby mst » Sat Apr 13, 2019 8:43 am

Suspicion: perhaps the fractional clock multiplier is required when using bitrates other than 44.1kHz and 48kHz? Can someone confirm?

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