XS1-L1 power supply sequencing?

Technical discussions around xCORE processors (e.g. xcore-200 & xcore.ai).
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leon_heller
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XS1-L1 power supply sequencing?

Post by leon_heller »

I'm designing a board round the new XS1-L1-48 device, and was wondering about the power supply sequencing. The data sheet for the XS1-L1-48 states:

The VDD supply must ramp from 0V to its final value within 10ms to ensure correct startup.

The VDDIO supply must ramp to its final value before VDD reaches 0.4 V.

and that for the XS1-L1-64 states:

To ensure correct device operation, the VDDIO supply should be present before the VDD supply. Specifically, the VDDIO supply should rise to its nominal operating range with VDD held at 0V. The VDD supply should then rise to its nominal operating range with a rise time of less than 10ms.

The design checklist states:

The VDDIO (and OTP_VDDIO if present) supply must be within specification (3.0V - 3.6V) before the VDD (core) supply is turned on. Specifically, the VDDIO supplies should be within specification before VDD core reaches 0.4V.

Do they in fact have different requirements? The XK-1 and XK-1A don't have supply sequencing,is it determined by the regulator characteristics?


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segher
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Post by segher »

leon_heller wrote:The XK-1 and XK-1A don't have supply sequencing,is it determined by the regulator characteristics?
It does have sequencing: the 1V regulator is enabled by the 3.3V regulator's power good signal.
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leon_heller
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Post by leon_heller »

Both regulators have Enable tied to 4V3.
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segher
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Post by segher »

leon_heller wrote:Both regulators have Enable tied to 4V3.
I was looking at the XK-1 revC schematic.

On the revB things seem to work by accident, yes.
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leon_heller
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Post by leon_heller »

The XK-1 Rev. C schematic also has a proper power-on reset circuit. My early boards seem deficient on both counts. :)

I'll use both on my board.