Your design might be OK, but rather than driving V1p0 from the 3p3 supply, I would think it better to drive it from the 5V supply. I think your intent is that the V1p0 would not start to ramp until v3p3 is good. I think that your v1p0 switcher can strart before v3p3 is stable. You still need a 3p3 power good signal on the enable to the 1p0 switcher, and once you have that you should run the 1p0 separately. My 2cents. While I have had absolutely no problems from my board, I would have preferred a longer hold off on the v1p0 enable following v3p3 good than the 5us from my adcmp.
Regards Mike
First board design - Power supply
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boeserbaer
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basil4j
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Thanks for the input, its appreciated.boeserbaer wrote:Your design might be OK, but rather than driving V1p0 from the 3p3 supply, I would think it better to drive it from the 5V supply. I think your intent is that the V1p0 would not start to ramp until v3p3 is good. I think that your v1p0 switcher can strart before v3p3 is stable. You still need a 3p3 power good signal on the enable to the 1p0 switcher, and once you have that you should run the 1p0 separately. My 2cents. While I have had absolutely no problems from my board, I would have preferred a longer hold off on the v1p0 enable following v3p3 good than the 5us from my adcmp.
Regards Mike
Here is revision 2...
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hirestech
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Hello basil4j,
Your power supply schematic appears to have a pair of errors in that both outputs of U1 (NC7WZ07) are open drain and no pull up resistors appear on this schematic page.
Kevin Halverson
CTO
High Resolution Technologies, LLC
Your power supply schematic appears to have a pair of errors in that both outputs of U1 (NC7WZ07) are open drain and no pull up resistors appear on this schematic page.
Kevin Halverson
CTO
High Resolution Technologies, LLC
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basil4j
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Hi Kevin,hirestech wrote:Hello basil4j,
Your power supply schematic appears to have a pair of errors in that both outputs of U1 (NC7WZ07) are open drain and no pull up resistors appear on this schematic page.
Kevin Halverson
CTO
High Resolution Technologies, LLC
Probably should have posted the other page...:) Sorry for the confusion! I'm now trying to dig up examples of wiring SDRAM or SRAM to an xmos chip, specifically examples of data rates vs interface type (SPI, parallel etc).
Lots of code around but can't find many comparisons of RAM types on xmos.com, xlinkers or xcore :(
Thanks for the help guys! This is a different beast to the propeller :)
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boeserbaer
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The SDRAM reference indicates 50Mbyte/s to 16 bit wide sdram. I have an as yet to be built design using an L1 dedicated to the sdram and avail over xlinks to basically create a pipeline buffer.
Regards mike
Regards mike
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vanjast
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This is what I have planned (to be completed before Xmas :D )
It's a portable XMos based thingy, hence the different battery i/p voltages.
The devices are 2Amp LDO's, and battery voltages are 1V above safe minimum, to reduce heat dissapation in the regulators - Being 2A devices is an overkill, but it should give them longer lifespans.
http://www.vanjast.com/XMOS/Saucer.JPG
:D
It's a portable XMos based thingy, hence the different battery i/p voltages.
The devices are 2Amp LDO's, and battery voltages are 1V above safe minimum, to reduce heat dissapation in the regulators - Being 2A devices is an overkill, but it should give them longer lifespans.
http://www.vanjast.com/XMOS/Saucer.JPG
:D