XEF232-1024-FB37 flash boot failure Topic is solved

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Guest

Post by Guest »

That is my OTP content:

Code: Select all

Sebastian@~/workspace/AN00162_i2s_loopback_demo xburn --id 0 --target-file XEF232-1024-FB374-C40.xn --read
Reading device...
Core 8:
*
0x00000567: 0xfffffff7
SR        : 0x00000000
Core 9:
SR        : 0x00000000
Core 10:
SR        : 0x00000000
Core 11:
SR        : 0x00000000
Sebastian@~/workspace/AN00162_i2s_loopback_demo


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Ross
XCore Expert
Posts: 966
Joined: Thu Dec 10, 2009 9:20 pm
Location: Bristol, UK

Post by Ross »

No security register bits should be set in the OTP by default: nothing is locked down.

(Probably stating the obvious, but don't try and set these unless you are sure its what you want - One Time really is One Time..)

Please can you try adding the "--force-pll-reset" option when running you xflash command.

I believe there is an issue changing the 2-wire boot link into the 5 wire link in your application XN and this should work-around it.
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Guest

Post by Guest »

I'm not so practiced in using the cmd line tool, so I tried it with xTIMEcomposer,
and add this option by Other XFlash options:, please see Screenshot in the attachment.
I hope that is right.

I could flash, but the cpu still didn't boot.

That is my acctual XN file.

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<?xml version="1.0" encoding="UTF-8"?>
<Network xmlns="http://www.xmos.com"
         xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
         xsi:schemaLocation="http://www.xmos.com http://www.xmos.com">
  <Type>PH Accurate</Type>
  <Name>XEF232-1024-FB374-C40 Device</Name>

  <Declarations>
    <Declaration>tileref tile[4]</Declaration>
    <Declaration>tileref usb_tile[2]</Declaration>
  </Declarations>

  <Packages>
    <Package id="0" Type="XS2-UEFnA-1024-FB374">
      <Nodes>
        <Node Id="0" InPackageId="0" Type="XS2-L16A-512" SystemFrequency="500MHz" OscillatorSrc="2">
          <Boot>
            <Source Location="bootFlash0"/>
            <Bootee NodeId="1"/>
          </Boot>
          <Tile Number="0" Reference="tile[0]">
            <Port Location="XS1_PORT_1B" Name="PORT_SQI_CS_0"/>
            <Port Location="XS1_PORT_1C" Name="PORT_SQI_SCLK_0"/>
            <Port Location="XS1_PORT_4B" Name="PORT_SQI_SIO_0"/>
          </Tile>
          <Tile Number="1" Reference="tile[1]"/>
        </Node>
        <Node Id="1" InPackageId="1" Type="XS2-L16A-512" SystemFrequency="500MHz" OscillatorSrc="3">
          <Boot>
            <Source Location="LINK" BootMode="4"/>
          </Boot>
          <Tile Number="0" Reference="tile[2]"/>
          <Tile Number="1" Reference="tile[3]"/>
        </Node>
        <Node Id="2" InPackageId="2" Type="periph:XS1-SU" Oscillator="24Mhz" Reference="usb_tile[0]">
        </Node>
        <Node Id="3" InPackageId="3" Type="periph:XS1-SU" Oscillator="24Mhz" Reference="usb_tile[1]">
        </Node>
      </Nodes>
      <Links>
        <Link Encoding="5wire" Delays="3clk">
          <LinkEndpoint NodeId="0" Link="7"/>
          <LinkEndpoint NodeId="1" Link="0"/>
        </Link>
        <Link Encoding="5wire" Delays="3clk">
          <LinkEndpoint NodeId="0" Link="4"/>
          <LinkEndpoint NodeId="1" Link="3"/>
        </Link>
        <Link Encoding="5wire" Delays="3clk">
          <LinkEndpoint NodeId="0" Link="6"/>
          <LinkEndpoint NodeId="1" Link="1"/>
        </Link>
        <Link Encoding="5wire" Delays="3clk">
          <LinkEndpoint NodeId="0" Link="5"/>
          <LinkEndpoint NodeId="1" Link="2"/>
        </Link>
        <Link Encoding="5wire">
          <LinkEndpoint NodeId="0" Link="8" Delays="52clk,52clk"/>
          <LinkEndpoint NodeId="2" Link="XL0" Delays="1clk,1clk"/>
        </Link>
        <Link Encoding="5wire">
          <LinkEndpoint NodeId="1" Link="8" Delays="52clk,52clk"/>
          <LinkEndpoint NodeId="3" Link="XL0" Delays="1clk,1clk"/>
        </Link>
      </Links>
    </Package>
  </Packages>

  <ExternalDevices>
    <Device NodeId="0" Tile="0" Class="SQIFlash" Name="bootFlash0">
      <Attribute Name="PORT_SQI_CS" Value="PORT_SQI_CS_0"/>
      <Attribute Name="PORT_SQI_SCLK" Value="PORT_SQI_SCLK_0"/>
      <Attribute Name="PORT_SQI_SIO" Value="PORT_SQI_SIO_0"/>
    </Device>
  </ExternalDevices>

  <JTAGChain>
    <JTAGDevice NodeId="0"/>
    <JTAGDevice NodeId="1"/>
  </JTAGChain>

</Network>
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Ross
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Posts: 966
Joined: Thu Dec 10, 2009 9:20 pm
Location: Bristol, UK

Post by Ross »

you can simply type the following in the command line to flash the board

Code: Select all

 xflash --force-pll-reset yourprogram.xe
whilst you are there, what is the result from the following command whist the design is in the broken boot state:

Code: Select all

xrun --dumpstate yourprogram.xe
(obviously change "yourprogram" to the name of your binary.. ;) )
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Guest

Post by Guest »

Ok I tried something.

You mean that there went some wrong with the changing from 2-wire to 5-wire connection link.
Now I changed the all 5-wire connections to 2-wire.

Tada it worked, the cpu is booting :)



//back to 5-wire links
xflash --force-pll-reset ....
CPU would not boot.


xrun //dumpstate ....

Code: Select all

***** Active Cores *****
  4  tile[3] core[0]  0xfff00518 in ?? ()
  3  tile[2] core[0]  0xfff00518 in ?? ()
  2  tile[1] core[0]  0xfff00518 in ?? ()
* 1  tile[0] core[0]  0x00040c3a in __sf ()

Thread 4 (tile[3] core[0]):

***** Call Stack *****
#0  0xfff00518 in ?? ()
#1  0xfff00342 in ?? ()
Backtrace stopped: previous frame identical to this frame (corrupt stack?)

***** Disassembly *****
0xfff00518:	in (2r)         r1, res[r6] *
0xfff0051a:	setd (r2r)      res[r6], r1
0xfff0051c:	in (2r)         r2, res[r6] *
0xfff0051e:	ldw (ru6)       r4, dp[0x0]
0xfff00520:	mkmsk (rus)     r5, 0x20

***** Registers *****
r0             0x0	0
r1             0x0	0
r2             0x0	0
r3             0x40000	262144
r4             0x200100	2097408
r5             0x100200	1049088
r6             0x10002	65538
r7             0x80a	2058
r8             0x0	0
r9             0x10023	65571
r10            0x3	3
r11            0x40b	1035
cp             0x0	0
dp             0xfff01eb0	-1040720
sp             0x7ff7c	524156
lr             0xfff00342	-1047742
pc             0xfff00518	-1047272
sr             0x40	64
spc            0x0	0
ssr            0x0	0
et             0x0	0
ed             0x0	0
sed            0x0	0
kep            0xfff00400	-1047552
ksp            0x0	0

Thread 3 (tile[2] core[0]):

***** Call Stack *****
#0  0xfff00518 in ?? ()
#1  0xfff00500 in ?? ()
Backtrace stopped: previous frame identical to this frame (corrupt stack?)

***** Disassembly *****
0xfff00518:	in (2r)         r1, res[r6] *
0xfff0051a:	setd (r2r)      res[r6], r1
0xfff0051c:	in (2r)         r2, res[r6] *
0xfff0051e:	ldw (ru6)       r4, dp[0x0]
0xfff00520:	mkmsk (rus)     r5, 0x20

***** Registers *****
r0             0x1	1
r1             0x0	0
r2             0x0	0
r3             0x40000	262144
r4             0xfff01ee8	-1040664
r5             0x100200	1049088
r6             0x2	2
r7             0x80a	2058
r8             0x0	0
r9             0x23	35
r10            0x3	3
r11            0x0	0
cp             0x0	0
dp             0xfff01eb0	-1040720
sp             0x7ff7c	524156
lr             0xfff00500	-1047296
pc             0xfff00518	-1047272
sr             0x40	64
spc            0x0	0
ssr            0x0	0
et             0x0	0
ed             0x0	0
sed            0x0	0
kep            0xfff00400	-1047552
ksp            0x0	0

Thread 2 (tile[1] core[0]):

***** Call Stack *****
#0  0xfff00518 in ?? ()
#1  0xfff00342 in ?? ()
Backtrace stopped: previous frame identical to this frame (corrupt stack?)

***** Disassembly *****
0xfff00518:	in (2r)         r1, res[r6] *
0xfff0051a:	setd (r2r)      res[r6], r1
0xfff0051c:	in (2r)         r2, res[r6] *
0xfff0051e:	ldw (ru6)       r4, dp[0x0]
0xfff00520:	mkmsk (rus)     r5, 0x20

***** Registers *****
r0             0x0	0
r1             0x0	0
r2             0x0	0
r3             0x40000	262144
r4             0x200100	2097408
r5             0x100200	1049088
r6             0x10002	65538
r7             0x80a	2058
r8             0x0	0
r9             0x10023	65571
r10            0x3	3
r11            0x40b	1035
cp             0x0	0
dp             0xfff01eb0	-1040720
sp             0x7ff7c	524156
lr             0xfff00342	-1047742
pc             0xfff00518	-1047272
sr             0x40	64
spc            0x0	0
ssr            0x0	0
et             0x0	0
ed             0x0	0
sed            0x0	0
kep            0xfff00400	-1047552
ksp            0x0	0

Thread 1 (tile[0] core[0]):

***** Call Stack *****
#0  0x00040c3a in __sf ()

***** Disassembly *****
0x40c3a <__sf+246>:	out (r2r)       res[r3], r2 *
0x40c3c <__sf+248>:	outct (rus)     res[r3], 0x1 *
0x40c3e <__sf+250>:	freer (1r)      res[r3] *
0x40c40 <__sf+252>:	retsp (u6)      0x1
0x40c42 <__sf+254>:	stw (2rus)      r0, r0[0x0]

***** Registers *****
r0             0x2	2
r1             0xc	12
r2             0x11111121	286331169
r3             0x20102	131330
r4             0x0	0
r5             0x11111111	286331153
r6             0x2	2
r7             0x40ce0	265440
r8             0x3261e	206366
r9             0x0	0
r10            0x40c60	265312
r11            0x0	0
cp             0x40c44	265284
dp             0x40c80	265344
sp             0x40f04	265988
lr             0x40959	264537	 __sseek + 65
pc             0x40c3a	265274	 __sf + 246
sr             0x40	64
spc            0x0	0
ssr            0x0	0
et             0x0	0
ed             0x0	0
sed            0x0	0
kep            0x40180	262528
ksp            0x0	0
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Guest

Post by Guest »

dumpstate with 2-Wire Link in XN file

Code: Select all

52	            p_ext3 <: 1;

***** Active Cores *****
  4  tile[3] core[0]  0x00040308 in _done ()
  3  tile[2] core[0]  ssd1305_control (spi=<value optimized out>, dc=<value optimized out>, res=<value optimized out>) at ../src/ssd1305.xc:557
  2  tile[1] core[0]  0x00040340 in _done ()
* 1  tile[0] core[0]  hallodx () at ../src/main.xc:52

Thread 4 (tile[3] core[0]):

***** Call Stack *****
#0  0x00040308 in _done ()

***** Disassembly *****
0x40308 <_done+12>:	waiteu (0r)      *
0x4030a:	stw (2rus)      r0, r0[0x0]
0x4030c <_exit>:	entsp (lu6)     0x0
0x40310 <_exit+4>:	add (2rus)      r1, r0, 0x0
0x40312 <_exit+6>:	ldc (ru6)       r0, 0x0

***** Registers *****
r0             0xffffffff	-1
r1             0xffffffff	-1
r2             0x1	1
r3             0x0	0
r4             0x2	2
r5             0x0	0
r6             0x0	0
r7             0x0	0
r8             0x8	8
r9             0xfffffff8	-8
r10            0x0	0
r11            0x0	0
cp             0x408dc	264412
dp             0x40928	264488
sp             0x7ff70	524144
lr             0x40306	262918	 _done + 10
pc             0x40308	262920	 _done + 12
sr             0x41	65
spc            0x0	0
ssr            0x0	0
et             0x0	0
ed             0x0	0
sed            0x0	0
kep            0x40100	262400
ksp            0x0	0

Thread 3 (tile[2] core[0]):

***** Call Stack *****
#0  ssd1305_control (spi=<value optimized out>, dc=<value optimized out>, res=<value optimized out>) at ../src/ssd1305.xc:557
#1  0x000401b0 in __main__main_tile_2 ()
#2  0x00040b18 in main ()

***** Disassembly *****
0x40386 <ssd1305_control+466>:	bu (u6)         -0x1
0x40388 <ssd1305_cmd>:	entsp (lu6)     0x6
0x4038c <ssd1305_cmd+4>:	std (l2rus)     r5, r4, sp[0x1]
0x40390 <ssd1305_cmd+8>:	stw (ru6)       r6, sp[0x4]
0x40392 <ssd1305_cmd+10>:	add (2rus)      r4, r2, 0x0

***** Registers *****
r0             0xff	255
r1             0x8	8
r2             0x8	8
r3             0x0	0
r4             0x10300	66304
r5             0x7ff60	524128
r6             0x20	32
r7             0x0	0
r8             0x3f	63
r9             0x40	64
r10            0x7ff48	524104
r11            0xff	255
cp             0x41550	267600
dp             0x41610	267792
sp             0x7fe18	523800
lr             0x40456	263254	 _Sssd1305_display_0 + 142
pc             0x40386	263046	 _Sssd1305_control_0 + 466
sr             0x0	0
spc            0x0	0
ssr            0x0	0
et             0x0	0
ed             0x1	1
sed            0x0	0
kep            0x40100	262400
ksp            0x0	0

Thread 2 (tile[1] core[0]):

***** Call Stack *****
#0  0x00040340 in _done ()

***** Disassembly *****
0x40340 <_done+12>:	waiteu (0r)      *
0x40342:	stw (2rus)      r0, r0[0x0]
0x40344 <_exit>:	entsp (lu6)     0x0
0x40348 <_exit+4>:	add (2rus)      r1, r0, 0x0
0x4034a <_exit+6>:	ldc (ru6)       r0, 0x0

***** Registers *****
r0             0xffffffff	-1
r1             0xffffffff	-1
r2             0x1	1
r3             0x0	0
r4             0x2	2
r5             0x0	0
r6             0x0	0
r7             0x17	23
r8             0x8	8
r9             0xfffffff8	-8
r10            0x0	0
r11            0x0	0
cp             0x40914	264468
dp             0x40960	264544
sp             0x7ff70	524144
lr             0x4033e	262974	 _done + 10
pc             0x40340	262976	 _done + 12
sr             0x41	65
spc            0x0	0
ssr            0x0	0
et             0x0	0
ed             0x1	1
sed            0x0	0
kep            0x40100	262400
ksp            0x0	0

Thread 1 (tile[0] core[0]):

***** Call Stack *****
#0  hallodx () at ../src/main.xc:52
#1  0x00040164 in __main__main_tile_0 () at ../src/main.xc:121
#2  0x000402fc in main ()

***** Disassembly *****
0x40154 <hallodx+48>:	out (r2r)       res[r11], r3 *
0x40156 <hallodx+50>:	out (r2r)       res[r4], r1 *
0x40158 <hallodx+52>:	bu (u6)         -0x9
0x4015a <hallodx+54>:	stw (2rus)      r0, r0[0x0]
0x4015c <__main__main_tile_0>:	entsp (lu6)     0x2

***** Registers *****
r0             0x10c00	68608
r1             0x0	0
r2             0x10d00	68864
r3             0x1	1
r4             0x10f00	69376
r5             0x0	0
r6             0x0	0
r7             0x0	0
r8             0x98	152
r9             0xffffff68	-152
r10            0x0	0
r11            0x10e00	69120
cp             0x40a50	264784
dp             0x40ad8	264920
sp             0x7ff60	524128
lr             0x40164	262500	 p_ext1.ctor + 0
pc             0x40154	262484	 hallodx + 48
sr             0x0	0
spc            0x0	0
ssr            0x0	0
et             0x0	0
ed             0x1	1
sed            0x0	0
kep            0x40100	262400
ksp            0x0	0
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Ross
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Posts: 966
Joined: Thu Dec 10, 2009 9:20 pm
Location: Bristol, UK

Post by Ross »

Glad its booting, you will be slowing down things a bit like that..

you should only need to change the boot-link in the XN, i.e. this one.

Code: Select all

<Link Encoding="5wire">
          <LinkEndpoint NodeId="0" Link="8" Delays="52clk,52clk"/>
          <LinkEndpoint NodeId="2" Link="XL0" Delays="1clk,1clk"/>
        </Link>
        <Link Encoding="5wire">
          <LinkEndpoint NodeId="1" Link="8" Delays="52clk,52clk"/>
          <LinkEndpoint NodeId="3" Link="XL0" Delays="1clk,1clk"/>
        </Link>
This way the XN file will match the boot-pins. The next tools release should fixe the upgrading the 2-wire to 5 wire after boot issue. --force-pll-reset option is normally a valid to work-around for this..
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Guest

Post by Guest »

I wasn't shure wich LINK is the boot link. So I changed the first four LINKS, aren't the last two for USB?

Code: Select all

        
      <Links>
        <Link Encoding="2wire" Delays="3clk">
          <LinkEndpoint NodeId="0" Link="7"/>
          <LinkEndpoint NodeId="1" Link="0"/>
        </Link>
        <Link Encoding="2wire" Delays="3clk">
          <LinkEndpoint NodeId="0" Link="4"/>
          <LinkEndpoint NodeId="1" Link="3"/>
        </Link>
        <Link Encoding="2wire" Delays="3clk">
          <LinkEndpoint NodeId="0" Link="6"/>
          <LinkEndpoint NodeId="1" Link="1"/>
        </Link>
        <Link Encoding="2wire" Delays="3clk">
          <LinkEndpoint NodeId="0" Link="5"/>
          <LinkEndpoint NodeId="1" Link="2"/>
        </Link>
        <Link Encoding="5wire">
          <LinkEndpoint NodeId="0" Link="8" Delays="52clk,52clk"/>
          <LinkEndpoint NodeId="2" Link="XL0" Delays="1clk,1clk"/>
        </Link>
        <Link Encoding="5wire">
          <LinkEndpoint NodeId="1" Link="8" Delays="52clk,52clk"/>
          <LinkEndpoint NodeId="3" Link="XL0" Delays="1clk,1clk"/>
        </Link>
      </Links>

When I change the last two LINKS to 2-Wire, I get the Error:
xrun: First stage multi-node boot failed, please check XN file and Xmos link connectivity
Nevertheless, maybe I could now demonstrate my board on an exhibition next week.

Big thanks,
Sebastian
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Ross
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Posts: 966
Joined: Thu Dec 10, 2009 9:20 pm
Location: Bristol, UK

Post by Ross »

Sorry, C&P error by me.. they were the links to the usb tiles..
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