USB library ports mismatch datasheet?
Posted: Mon Jan 07, 2019 5:14 pm
I'm using a XU216 processor and according to the USB device library some ports are reserved when using this library.
The library uses the following defines for these ports:
#elif (XUD_SERIES_SUPPORT == XUD_X200_SERIES)
#define PORT_USB_CLK on USB_TILE: XS1_PORT_1C
#define PORT_USB_TXD on USB_TILE: XS1_PORT_8A
#define PORT_USB_RXD on USB_TILE: XS1_PORT_8B
#define PORT_USB_TX_READYOUT on USB_TILE: XS1_PORT_1K
#define PORT_USB_TX_READYIN on USB_TILE: XS1_PORT_1H
#define PORT_USB_RX_READY on USB_TILE: XS1_PORT_1I
#define PORT_USB_FLAG0 on USB_TILE: XS1_PORT_1E
#define PORT_USB_FLAG1 on USB_TILE: XS1_PORT_1F
#define PORT_USB_FLAG2 on USB_TILE: XS1_PORT_1G
#else
All ports match the datasheet except for port XS1_PORT_1C (usb clk). This port is according to datasheet PORT_1J.
Is this a bug or am I missing something??
The library uses the following defines for these ports:
#elif (XUD_SERIES_SUPPORT == XUD_X200_SERIES)
#define PORT_USB_CLK on USB_TILE: XS1_PORT_1C
#define PORT_USB_TXD on USB_TILE: XS1_PORT_8A
#define PORT_USB_RXD on USB_TILE: XS1_PORT_8B
#define PORT_USB_TX_READYOUT on USB_TILE: XS1_PORT_1K
#define PORT_USB_TX_READYIN on USB_TILE: XS1_PORT_1H
#define PORT_USB_RX_READY on USB_TILE: XS1_PORT_1I
#define PORT_USB_FLAG0 on USB_TILE: XS1_PORT_1E
#define PORT_USB_FLAG1 on USB_TILE: XS1_PORT_1F
#define PORT_USB_FLAG2 on USB_TILE: XS1_PORT_1G
#else
All ports match the datasheet except for port XS1_PORT_1C (usb clk). This port is according to datasheet PORT_1J.
Is this a bug or am I missing something??