XCore Exchange

Whe is used configure_clock_rate_at_least(clock clk, unsigned a, unsigned b); or at_most
howto get unsigned clock value ???

According to most documentation, configure_clock_rate_at_least(clk, a, b) configures a clock to run at the slowest rate supported by the hardware that is equal to or exceeds (a/b) MHz. An exception is raised if no rate satisfies this criterion.

Some documentation says a 100 MHz clock is needed to guarantee correct operation of this function.

Ahh this i read and how is slowest rate supported by the hardware without exception ? And yes ref is 100M.

I don't know for sure. The clock block divider is 8 bits wide, and I think there is a /2 prescaler when the divider is used, so I assume the lowest ratio would be /512 (or maybe /510, near enough). I guess if you wanted even slower operation you could drop the tile clock first.

I test configure_clock_rate_at_least(cbspi, 100, 2); configure_clock_rate_at_least(cbspi, 100, 3); configure_clock_rate_at_least(cbspi, 100, 4); ...
In simulator clock rises ok, but i need number or macro to know this clock.

I suggest you set the divider directly using configure_clock_rate(). That way if your code doesn't raise an exception you know precisely what your divider is, and therefore what your clock rate is if you know the reference clock.

Sorry , but i dont ask how work configure_clock_rate(). Your idea is about constant clk, but my code for example can communicate and get speed request from other device, then need configure at MOST LEAST clk and reply to device how this speed is, and change this on the fly.

XS1 lib have this void functions years ago , but why is void ?

Sure, OK. I see. There's an assembly instruction called getd, check out the ISA. I suspect you should be able to get the clock block divider value if you execute that instruction on the clock block. Then you can compute the actual clock block frequency if you know the reference frequency. I've never used this instruction but it should be possible.