a look at the new instructions. This is just spelling, not any
actual semantics, but we can guess...
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MOVED:
r2 0000 byterev $ra,$rb from r2_0 100000
r2 0800 clz $ra,$rb from r2_0 000800
r2 1000 bitrev $ra,$rb from r2_0 000000
r2_0 000000 init t[$rB]:sp,$rA from r2 1000
r2_0 000001 init t[$rB]:cp,$rA from r2 1800
r2_0 100000 init t[$rB]:pc,$rA from r2 0000
r2_0 000800 init t[$rB]:dp,$rA from r2 0800
r2_0 000801 tsetmr $rA,$rB from r2 1810
r3_0 b000 set t[$rC]:$rA,$rB from r3 b800
insns (so they can be paired); the cross-thread register access
instructions do not need to be short.
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REMOVED:
u6 78c0 krestsp $ui
r0 0011 kret
r0 0012 dret
r0 1000 dentsp
r0 1001 drestsp
removed? And then? There are no clues here :-)
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NEW:
u6 7c80 dualentsp $ui
r0 1013 nop
r1 8800 gettime $ra
r1 8810 elate $ra
r3_0 9801 unzip $rA,$rB,$bC
r3_0 9802 zip $rA,$rB,$bC
r3_0 c801 outpw res[$rB],$rA,$rC
r3_1 0810 crcn $ra,$rA,$rB,$rC
r3_1 1000 std $ra,$rA,$rB[$rC]
r3_1 1010 std $ra,$rA,$rB[$uC]
r3_1 2000 ldd $ra,$rA,$rB[$rC]
r3_1 2010 ldd $ra,$rA,$rB[$uC]
r3_2 0810 xor4 $rA,$ra,$rB,$rC,$rb
r3_2 1800 lextract $rA,$ra,$rB,$rC,$bb
r3_2 1810 linsert $rA,$ra,$rB,$rC,$bb
r3_2 2810 crc32_inc $rA,$rB,$rC,$ra,$bb
else setting r0. "gettime" is nice (reference clock always?);
"elate" ("exception if late"?) is fun too. Zip and unzip, are
those some sheep-and-goats instructions, interleaving bits?
Then we have an "outpw" taking a register as count, and a "crcn";
is that shifting a variable number of bits? Together they should
be quite useful for USB, MII, etc. "crc32_inc", I have no clue.
"lextract", "linsert" -- not sure about the exact semantics, but
that sounds like double-word shift-and-mask things. What "xor4"
is useful for, I have no idea. But ldd/std are more obvious ;-)