Hello All.
As I'm still total newbie, I have a lot of questions.
I've made a small PCB, like USB Audio Reference Design, with small changes.
The software I use also from the Reference Design with the minor changes.
Before I will work with the final software, I want to be sure that my hardware is working, and with this I have a problem!
If I run this software on a Reference Design board - it works, but with my board - not. I cannot run it with XRUN, also XFLASH does not see the device (but maybe here I also doing something wrong?).
Can some of the experts to see my schematic (see attachment) - mayby something is wrong?
(do not pay attention to R27,R27 values, they are not correct at the schematics, but at PCB are OK).
Can also somebody from experts help with a small FAQ:
how is possible to check that the hardware is working, that XTAG is able to talk with CPU and with Flash Memory?
Thank you.
Need help with the simple custom board
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Need help with the simple custom board
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Hi. My quick review and Spidey sense says to review your power sequencing circuit (ie. U11 & U9 relationship). You are wanting to monitor the power sequencing and using the 3.3 volt power supervisor device from TI. Yet, you are using the /SENSE pin and have mated it to the output of the 1V0 LDO ? Then this supervisor ENABLES / DISABLES the 1V0 LDO that you are monitoring ? Something recursive here... Is this power circuit from an earlier ref design ?
Also, there are many fixed 1V0 LDOs that operate without the need for resistor voltage dividers. That is the route we prefer to take to avoid production blues. That is, especially if the resistors are not soldered correctly, etc. - may nuke the downstream devices so it is too risky for us to take this approach. Have a look at Semtech and others who have digital pin selections for fixed low voltage outputs. Can provide specifics but Atomsoft has a post here somewhere where he found a low cost device from Semtech. We have applied SC183C but may be an overkill.
Do check the voltages on the design but that is the area I would focus on.
< more comments - part 2 >
Is the /RST output on the TPS3106 open-drain or push-pull ? The datasheet is not very clear on this topic. If open-drain, then you will be required to apply a pull-up resistor on the same pin to allow the /RST line to be high when this output is in hi-z mode (ie. open drain).
If the pin is not open drain and is push-pull then you will not be able to share with the external XTAG-2 tool. For debugging and use of the common /RST pins, the drivers must be open drain.
For immediate checking, consider to apply a 10k or similar pull-up on the RST_N line of the XMOS device to +3.3 volts.
Cut the trace from the TPS3106 /RST output (Pin_5).
Connect the XTAG-2 tool and attempt to connect to your project. Does it work ? Summary - you cannot share output pins that are push-pull.
Do check the voltages. If powered from USB, there is a 100 mA limit unless you announce as a high powered device. Better to power the project from a fixed external 5 volt power supply for initial verification.
Just from the quick review. Hope this helps.
Kumar
Also, there are many fixed 1V0 LDOs that operate without the need for resistor voltage dividers. That is the route we prefer to take to avoid production blues. That is, especially if the resistors are not soldered correctly, etc. - may nuke the downstream devices so it is too risky for us to take this approach. Have a look at Semtech and others who have digital pin selections for fixed low voltage outputs. Can provide specifics but Atomsoft has a post here somewhere where he found a low cost device from Semtech. We have applied SC183C but may be an overkill.
Do check the voltages on the design but that is the area I would focus on.
< more comments - part 2 >
Is the /RST output on the TPS3106 open-drain or push-pull ? The datasheet is not very clear on this topic. If open-drain, then you will be required to apply a pull-up resistor on the same pin to allow the /RST line to be high when this output is in hi-z mode (ie. open drain).
If the pin is not open drain and is push-pull then you will not be able to share with the external XTAG-2 tool. For debugging and use of the common /RST pins, the drivers must be open drain.
For immediate checking, consider to apply a 10k or similar pull-up on the RST_N line of the XMOS device to +3.3 volts.
Cut the trace from the TPS3106 /RST output (Pin_5).
Connect the XTAG-2 tool and attempt to connect to your project. Does it work ? Summary - you cannot share output pins that are push-pull.
Do check the voltages. If powered from USB, there is a 100 mA limit unless you announce as a high powered device. Better to power the project from a fixed external 5 volt power supply for initial verification.
Just from the quick review. Hope this helps.
Kumar
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Hi,
thank you for your answer.
No recursion, TPS3106 has 2 parts:
1st monitor VDD (3.3V) and control /RVDD output so 1.0V PS will enabled only when 3.3V will be present.
2nd part - monitor 1.0V PS' output through R23/R27 divider (1k2/10k) with 0.94v output. TPS's threshold is 0.55v.
Output of the 2nd part is RES_N signal (CPU reset).
But you are right - I forget to add pull up resistor, so it is missing on a schematic, but I wired 10k on a PCB manualy.
- I see continuous "0" at EEPROM /CS pin
- I see shout "1" pulses at EEPROM SI at the beginning, then "0"
- I see continuous 2.5 MHz square wave at EEPROM SCLK.
So, I think CPU is alive.
And I repeat the second question:
could somebody will be so kind, to write the set on commands (XRUN/XFLASH/??? from the command line), with which I can test XTAG connection and EEPROM?
What I mentioned before - maybe I used the wrong commands.
thank you for your answer.
No, this is my idea.mon2 wrote:Hi. My quick review and Spidey sense says to review your power sequencing circuit (ie. U11 & U9 relationship). You are wanting to monitor the power sequencing and using the 3.3 volt power supervisor device from TI. Yet, you are using the /SENSE pin and have mated it to the output of the 1V0 LDO ? Then this supervisor ENABLES / DISABLES the 1V0 LDO that you are monitoring ? Something recursive here... Is this power circuit from an earlier ref design ?
No recursion, TPS3106 has 2 parts:
1st monitor VDD (3.3V) and control /RVDD output so 1.0V PS will enabled only when 3.3V will be present.
2nd part - monitor 1.0V PS' output through R23/R27 divider (1k2/10k) with 0.94v output. TPS's threshold is 0.55v.
Output of the 2nd part is RES_N signal (CPU reset).
This LDO also not need voltage divider, it is for reset monitoring onlyAlso, there are many fixed 1V0 LDOs that operate without the need for resistor voltage dividers.
1.8V, 3.3V and 1.0V are stable and clear.Do check the voltages on the design but that is the area I would focus on.
It is very clear in TI's DS at many places - both, /RST and /RVDD are open drain for 3106.< more comments - part 2 >
Is the /RST output on the TPS3106 open-drain or push-pull ? The datasheet is not very clear on this topic. If open-drain, then you will be required to apply a pull-up resistor on the same pin to allow the /RST line to be high when this output is in hi-z mode (ie. open drain).
But you are right - I forget to add pull up resistor, so it is missing on a schematic, but I wired 10k on a PCB manualy.
I just power from the desktop PS, the current is ~180mA
Do check the voltages. If powered from USB, there is a 100 mA limit unless you announce as a high powered device. Better to power the project from a fixed external 5 volt power supply for initial verification.
What also interesting, after the power up without XTAG (alto I was not able to put the program to EEPROM):
Just from the quick review. Hope this helps.
Kumar
- I see continuous "0" at EEPROM /CS pin
- I see shout "1" pulses at EEPROM SI at the beginning, then "0"
- I see continuous 2.5 MHz square wave at EEPROM SCLK.
So, I think CPU is alive.
And I repeat the second question:
could somebody will be so kind, to write the set on commands (XRUN/XFLASH/??? from the command line), with which I can test XTAG connection and EEPROM?
What I mentioned before - maybe I used the wrong commands.
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Mayby my XTAG connection is not right?
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On the XMOS device, you have RST_N and TRST_N connected together. This does not match the ref design schematics from XMOS.AlexAdvice wrote:Mayby my XTAG connection is not right?
Test the following configuration:
a) disconnect TRST_N (Pin 20) from RST_N (Pin 8) on the XMOS device.
b) connect the TRST_N (Pin 20) line on the XMOS to TRST_N pin 1 (J4) on the XTAG-2 header
To rephrase, only SRST_N (XTAG-2; Pin 2 J4) should be connected to the RST_N (Pin 8) on the XMOS device.
Respectively, TRST_N (XTAG-2) is to connect to TRST_N and Mode2 & Mode3 pins on the XMOS device (Pins 18,19,20 to be shorted on your XMOS device/package).
See if the above works.
Kumar
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I'll try tomorrow.mon2 wrote:On the XMOS device, you have RST_N and TRST_N connected together. This does not match the ref design schematics from XMOS.AlexAdvice wrote:Mayby my XTAG connection is not right?
You are right - in Ref.Design onlu RST_N is connected to XTAG's, SRST_N and TRST_N is together with MODE2,3 is connected to XTAG's TRST_N.
But, in the datasheet is written:
It is error ?RST_N and TRST_N to pin 15 of the xSYS header
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That depends on what reference design you look at. All themon2 wrote:On the XMOS device, you have RST_N and TRST_N connected together. This does not match the ref design schematics from XMOS.
"modern" boards as well as the datasheet checklist have the
tap reset connected directly to the system reset.
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So, I do not need to make this change at my PCB?segher wrote:That depends on what reference design you look at. All themon2 wrote:On the XMOS device, you have RST_N and TRST_N connected together. This does not match the ref design schematics from XMOS.
"modern" boards as well as the datasheet checklist have the
tap reset connected directly to the system reset.
As XMOS generates clock and /CS to flash, I can suppose that CPU is OK.
How can I check that XTAG-2 is able to "speak" with CPU and Flash?
The 1st I found:
Code: Select all
XRUN -lb
Available XMOS Devices
----------------------
ID Name Adapter ID Devices
-- ---- ---------- -------
0 XMOS XTAG-2 jSteK4Kd L1[0]
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At this stage I would try to run a simple application through JTAG first and if that works test the flash by uhm trying to flash some app to it using xflash. Did you make an XN file for your custom board? Also xflash can take a parameter defining the flash spec file.
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xrun detects your chip just fine (that's that "L1[0]").
Everything you've seen about the flash so far (the CS,
SI, SCK behaviour at normal bootup) looks fine as well.
So, what does _not_ work? You haven't shown anything
that does not work yet!
Your next steps would be to run a simple program (something
that blinks a LED perhaps); run something that uses USB
(maybe the HID demo); and try to program one of those
to flash.
Everything you've seen about the flash so far (the CS,
SI, SCK behaviour at normal bootup) looks fine as well.
So, what does _not_ work? You haven't shown anything
that does not work yet!
Your next steps would be to run a simple program (something
that blinks a LED perhaps); run something that uses USB
(maybe the HID demo); and try to program one of those
to flash.