Code only runs after flash as

[gerrykurz]

Here is the current state of affairs.

The xmos devices do not boot from flash at power up.
My arm supervisor determines that they have not started after 700 ms.
The supervisor issues a 20 ms reset pulse.
The xmos chips then boot up correctly.

This is working reliably at this point after testing repeatedly last night and again this morning.

If the AVB ref design has bugs - that must be addressed. However, I looked at the XK-AVB-LC-SYS schematic and both TRSTn and RSTn get asserted by the supervisor at power on (see below attachment)..although both can be asserted independently by the debug adapter. Use of TRST (ie asserted at reset) is mentioned twice in the datasheet.

Yes this is true but the other difference from the slice kit design is having the mode pins tied to TRST.

You still don't hold the MODE pins at the
proper value while reset is in progress.

If this is the issue, then the AVB endpoint design should not work either. I don't believe this is the issue because the xmos chip was reading from flash when the boot up was not working. Also it does boot after the reset pulse which generates the same RST, TRST, MODE PINS waveform. However, in the interest of completeness, I will confirm this on my current implementation.

H.3 Power on reset
The RST_N and TRST_Npins are asserted (low) during or after power up. The device is not used until these resets have taken place.

Also in the interest of completeness, this design checklist note does not specifically say that RST_N and TRST_N have to done at the exactly the same time. Nor does it say that they need to be tied together. This is mentioned in the previous section about how to implement the XSYS header but only in the context of using the XSYS. Also the AVB endpoint design does not do this.

G.2 JTAG-only xSYS header

RST_N and TRST_N to pin 15 of the xSYS header

Also what about this:

TRST gets asserted. Looks like it can be before RST, but still needs to happen on power up.

It still seems that driving TRST high before RST, does not work at power up but does work after power up. However when I tried this, it did not work.

I am beginning to suspect a couple of things. The main difference between my circuit and the AVB endpoint reference design is in the reset timing. My "voltage supervisor" is a microcontroller and I delay 200 ms after the 1V power good signal to allow the 1V supply to stabilize at it's final value. I have also noticed that doing a long reset pulse (> about 100 ms) does not seem to reset the chips correctly. The xgdb reset pulse is very narrow (< 1 ms) and what is working for me now is having a reset pulse that is 2 ms wide.

Somehow holding the chip in reset for more than about 100 ms seems to be causing a problem both at power up and after power up.

[gerrykurz]

Here is the scope capture that confirms the mode pins are being read correctly.

The reset from power up does not boot correctly but after a second reset it does.

In both cases, there is activity on the flash CS line.

Boot up by doing second reset

[gerrykurz]

In the scope capture I just posted, the SPI activity looks different between a bad boot and a good one.

Here is another capture, that shows the SPI activity looking the same between a good and bad boot.

Another bootup image

[gerrykurz]

Ok, I have just loaded a bit of code that runs on tile 0 and on tile 3 (the end of the boot chain) into flash and have confirmed that it loads and runs.

So I conclude that my xn file is good.