Hey there,
anyone know if it's possible to update the firmware on an XTAG2?
Thanks.
XTAG2 firmware update?
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Looking at its schematic I would say no as there doesn't seem to be an external Flash/EE chip connected to the XS1 L1. I'm guessing the firmware is programmed into the 8K OTP memory.
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The firmware in the OTP contains only a simple USB bootloader, the JTAG firmware is loaded at runtime by the tools.
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USB boot loader :idea:
Could the boot loader be used to load a user program?
Could the boot loader be used to load a user program?
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Yes it can,
The only restriction is that you only have up to 44K of loadable program space on the device (the rest can be used as stack space, but the loader runs from 0x1b000, it is relocated on device boot)
It is certainly possible to take a binary built with the tools and load it onto the XTAG-2, we have for example used it as a USB 2.0 audio device internally. You only have a few I/O's on the connector, these can be seen from the XTAG-2 schematic.
We are not officially supporting it as a target device in the tools at the moment for user code but it is easy to write your own loader using libusb. The loader is pretty simple, the following code sequence shows the main part of the host loader (this is used to load the JTAG firmware in the tools)
If anyone is interested in using the XTAG-2 in this way then I can provide more details.
The only restriction is that you only have up to 44K of loadable program space on the device (the rest can be used as stack space, but the loader runs from 0x1b000, it is relocated on device boot)
It is certainly possible to take a binary built with the tools and load it onto the XTAG-2, we have for example used it as a USB 2.0 audio device internally. You only have a few I/O's on the connector, these can be seen from the XTAG-2 schematic.
We are not officially supporting it as a target device in the tools at the moment for user code but it is easy to write your own loader using libusb. The loader is pretty simple, the following code sequence shows the main part of the host loader (this is used to load the JTAG firmware in the tools)
Code: Select all
static void loader_to_jtag() {
unsigned int i = 0;
unsigned int address = 0;
unsigned int num_blocks = 0;
unsigned int block_size = 0;
unsigned int remainder = 0;
unsigned int data_ptr = 0;
int cmd_buf[LOADER_BUF_SIZE/4];
memset(cmd_buf, 0, LOADER_BUF_SIZE);
cmd_buf[0] = LOADER_CMD_GET_VERSION;
device_write((char *)cmd_buf, 4, 1000);
device_read((char *)cmd_buf, 8, 1000);
address = 0x10000;
block_size = LOADER_BUF_SIZE - 12;
num_blocks = l1_jtag_bin_len / block_size;
remainder = l1_jtag_bin_len - (num_blocks * block_size);
for (i = 0; i < num_blocks; i++) {
cmd_buf[0] = LOADER_CMD_WRITE_MEM;
cmd_buf[1] = address;
cmd_buf[2] = block_size;
memcpy(&cmd_buf[3], &l1_jtag_bin[data_ptr], block_size);
device_write((char *)cmd_buf, LOADER_BUF_SIZE, 1000);
device_read((char *)cmd_buf, 8, 1000);
address += block_size;
data_ptr += block_size;
}
if (remainder) {
cmd_buf[0] = LOADER_CMD_WRITE_MEM;
cmd_buf[1] = address;
cmd_buf[2] = remainder;
memcpy(&cmd_buf[3], &l1_jtag_bin[data_ptr], remainder);
device_write((char *)cmd_buf, LOADER_BUF_SIZE, 1000);
device_read((char *)cmd_buf, 8, 1000);
}
cmd_buf[0] = LOADER_CMD_JUMP;
device_write((char *)cmd_buf, 4, 1000);
device_read((char *)cmd_buf, 8, 1000);
}
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I can see this opening up some nice hardware hacks but its a shame none of the accessible I/O signals are aligned to a 4-bit or 8-bit port.
Last edited by TonyD on Tue Feb 09, 2010 4:18 pm, edited 1 time in total.
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Yes only 8 single bit ports and some xlinks via the IDC connector. There is still plenty xmos have planned for this from a tools perspective but it makes a pretty simple prototyping system for anyone who wants to play around with some simple USB devices.TonyD wrote:I can see this opening up some nice hardware hacks but its a shame none of the accessibility I/O signals are aligned to a 4-bit or 8-bit port.
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I hope we hear more about Xmos plans for XTAG2.
In the mean time I've attached a pdf showing the XS1 L1 ports available at the 20-pin IDC header if anyone feels like using it in a non JTAG way :)
In the mean time I've attached a pdf showing the XS1 L1 ports available at the 20-pin IDC header if anyone feels like using it in a non JTAG way :)
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They are the ones in bold, presumably.
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yes, the signals in bold are those available at the 20-pin connector.