What is the best way to transfer data between Tasks?

[dirk1980]

Hi,

I've there a smal problem.
Maybe i think to complicated or not yet enough in XC.

I need a system witch fetches data from a interface (10MHz 8 bit parallel).
These data is always in blocks of 256Byte.
This data blocks are going into a fifo and a 2. Task shall filter some data blocks.
Then the filtered data blocks are are going into a 2. Fifo.
A 3nd task fetches this data and sending this data over SPI.

How can i do this best under XC?

Is the FIFO system the best?

Dirk

[infiniteimprobability]

Hi,

10MBytes (80mb) per second isn't that fast for XMOS, so these data rates are easy to handle.

If you are receiving from one task and sending a 256 byte buffer to the next, it probably doesn't make sense to send a block of data via channels - it will mean that your rx task blocks whilst the buffer is transmitted. It's only 2Kb of data and channels run at 100s mbps, but you could block for a few microseconds. At 10MHz, assuming regular data, that's tens of missed transfers.

A nice way of doing this would be to send a message and pointer to a buffer. So the rx task regulalrly recieves data and hands over a full buffer when done. Having two buffers would mean you can fill one whilst the downstream task empties the other. 

Section 13 of the XC programming guide shows a double buffer example using movable pointers (which is a safe way of passing pointers to shared memory in XMOS systems).

https://www.xmos.com/download/public/XM ... on)(B).pdf

I reccomend you start there..

 

[dirk1980]

A normal FIFO didn't work?

On a ARM in C this would be my normal way.

Well this example can work between the input and the filter Task. But my SPI Task is a slave and i can't swap buffers there, because i can't say when the Master is asking for the data. That's the reason why i need a FIFO.

The Filter Task is collecting only 2-5% of the input data for the SPI Task.

Is the an easy example for a FIFO between Tasks?

I can't find one, sorry.

Dirk

[infiniteimprobability]

Hi,

Sorry - when I heard you talk about receiving blocks of data, I naturally assumed you wanted a pointer to a full buffer..

Yes a FIFO will work, and of course this is easily done. In XMOS, you typically split tasks onto cores. For example, your I/O receiver task runs on one core, and your consumer task runs on another. They are normally connected via either channels or (new XC) interfaces. If they pass buffers across, then they will share memory too.

Because the two tasks run on different logical cores, they need to be run in parallel and have a connection delcared between them (ie. channel/interface). So FIFO may look a little different from ARM, because you have inter-core communication.

We have an example of a FIFO using interfaces here https://www.xmos.com/published/app_buff ... e?secure=1

There is also another example of a FIFO between two cores (used to be call threads) here:

https://github.com/xcore/sc_util/tree/m ... dule_xfifo

Hope that helps. 

 

[dirk1980]

Hi,

yes this will help.

I found the first Example just 2 minutes after my post.

And i found  in the AVB Code a FIFO but how this one is working? I don't known.

It's lock like a transfer over an interface.

 

Well i must try some of the Code and when i have some problems again, i will ask again.

 

Dirk

[yuvaraj]

Hi,

 

You can refer the application available on github for fifo implementation.

https://github.com/xcore/sc_util/tree/m ... fo_example

-Yuvaraj