I rewrote the program a little to measure the actual transfer rate.
(I'm using a BUFFER_SIZE of 240 in the test, just took it since that is one column on the LCD)
This is the outcome if the SRAM server and the SRAM read write function are located on the same core
writing to SRAM in byte mode...
total time to write 29623us:Eq to 17698kB/s
reading back from SRAM in byte mode to validate it...
total time to write 29607us:Eq to 17708kB/s
test PASS
writing to SRAM in word mode...
total time to write 14945us:Eq to 35081kB/s
reading back from SRAM in word mode to validate it...
total time to write 12855us:Eq to 40784kB/s
test PASS
writing to SRAM in single word...
total time to write 50462us:Eq to 10389kB/s
reading back from SRAM in single word to validate it...
total time to write 47677us:Eq to 10996kB/s
test PASS
If I move the SRAM read write function to an other core the performace looks like this
test iteration 0
writing to SRAM in byte mode...
total time to write 29825us:Eq to 17578kB/s
reading back from SRAM in byte mode to validate it...
total time to write 29793us:Eq to 17597kB/s
test PASS
writing to SRAM in word mode...
total time to write 14997us:Eq to 34959kB/s
reading back from SRAM in word mode to validate it...
total time to write 14661us:Eq to 35760kB/s
test PASS
writing to SRAM in single word...
total time to write 61931us:Eq to 8465kB/s
reading back from SRAM in single word to validate it...
total time to write 56688us:Eq to 9248kB/s
test PASS
I do not know which SRAM chip that is fitted on the XDK but a comment in the code suggests it's a "12ns chip"
A look at a piece of code looks like this:
Code: Select all
p_sram_ctl <: SRAM_CTL_PORT_RD;
// read with address.
p_sram_addr <: Adrs;
sync(p_sram_addr);
// increment address for next time.
Adrs += 1;
p_sram_data :> Temp;
p_sram_data :> >> Data; // Read first Byte
// read with address.
p_sram_data :> Temp;
Before the actual readout of the SRAM
p_sram_data :> >> Data;
If it's a 12 ns SRAM, why fit the line p_sram_data :> Temp; since several 10ns instructions has passed anyway after the p_sram_addr <: Adrs; line